INES Mapper 163: Difference between revisions

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[[Category:iNES Mappers|163]]
{{DEFAULTSORT:163}}[[Category:iNES Mappers]][[Category:Mappers using $4020-$5FFF]][[Category:Mappers with CHR RAM]]
'''iNES Mapper 163''' denotes the 南晶 (Nánjīng) '''FC-001''' circuit board, used on most of their games, including:
* ''牧场物语 - Harvest Moon'' (NJ011)
* ''水浒神兽'' (Shuǐhǔ Shénshòu, NJ019)
* ''暗黑破坏神 - Diablo'' (NJ037)
* ''轩辕剑外传 之 天之痕'' (Xuānyuánjiàn Wàizhuàn zhī Tiānzhīhén, NJ045)
* ''Final Fantasy IV - 最终幻想 4꞉ 光与暗 水晶纷争'' (NJ098)


This is similar to [[INES_Mapper_164]]
=Banks=
* CPU $6000-$7FFF: 8 KiB unbanked PRG-RAM, battery-backed
* CPU $8000-$FFFF: 32 KiB switchable PRG-ROM bank
* PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM bank, 4 KiB can be automatically switched
* Nametable mirroring: hard-wired


Details from FCEUX source code:
=Registers=
All registers are initialized to $00 on reset.
==PRG Bank Low/CHR-RAM Switch ($5000, write)==
Mask: $FF00
D~7654 3210
  ---------
  C... PPPP
  |    ++++- PRG A18..A15
  +--------- Automatic 4 KiB CHR-RAM switch: when PPU A13=0 (pattern table) ...
              0: CHR A12=PPU A12 (disable auto-switch)
              1: CHR A12=PPU A9 latched on last rise of PPU A13 (enable auto-switch)


Memory map:
* Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position. This auto-switch behavior is similar to that of [[iNES Mapper 096|mapper 96]].
*5000-5FFF = Registers and copy protection
* Bits 0 and 1 are subject to the [[#Mode ($5300, write)|Mode register]].
*6000-7FFF = PRG RAM (battery backed)
*8000-FFFF = PRG ROM (switchable in 32k banks)


Registers: (Address is masked with 0x7300)
==PRG Bank High ($5200, write)==
*5200 = [....xxxx] xxxx = High nibble of 32k PRG page
Mask: $FF00
*5000 = [c...xxxx] xxxx = Low nibble of 32k PRG page. If the most significant bit of this register is set, it does automatic CHR RAM switching at scanline 128. The exact way this works is unknown.
**When turned on, both 4K CHR RAM banks 0000-0FFF and 1000-1FFF map to 0000-0FFF for scanline 240 until scanline 128. Then at scanline 128, both 4K CHR banks point to 1000-1FFF.
D~7654 3210
*5100 = When set to 6, sets the 32K PRG bank to 3.  Further writes to 5200 or 5000 change the bank back to normal.
  ---------
  .... ..PP
          ++- PRG A20..A19
* Bits 0 and 1 are subject to the [[#Mode ($5300, write)|Mode register]]. 1 MiB games connect both ASIC PRG A19 and A20 outputs to ROM A19, effectively exempting this register from the bit-swap.


Copy protection: (Address is masked with 0x7300, except for 5101)
==Feedback Write ($5100-$5101, write)==
*5300 = Value of security register
Mask: $FF01
*5101 = If the value of this register is changed from nonzero to zero, "trigger" is toggled (XORed with 1). Initial value of this register is 1, initial value of "trigger" is 0.
D~7654 3210  A~FEDC BA98 7654 3210
  ---------    -------------------
  .... .F.E    .... .... .... ...A
        | |                      +- Action on write
        | +- A=0: Value latched
        |    A=1: Value latched, and flip the latched F bit on falling edges of E (i.e. 1->0).
        +--- A=0: Value latched
              A=1: Ignored, previously-latched value either kept or flipped


Reading: (Address is masked with 0x7700)
* Bit 0 is subject to the [[#Mode ($5300, write)|Mode register]].
*5100 = Returns value of 5300
==Feedback Read ($5500-$5501, read)==
*5500 = If "trigger" is 1, returns value of 5300, otherwise returns 0
Mask: $F300
D~7654 3210
  ---------
  .... .F..
        +--- Inverted value of latched F bit
 
* ''暗黑破坏神 - Diablo'' (Ànhēi Pòhuàishén, NJ037) only checks that F is read back inverted.
* ''轩辕剑外传 之 天之痕''  (Xuānyuánjiàn Wàizhuàn zhī Tiān zhī Hén, NJ045) checks that F is flipped on falling edges of E.
 
==Mode ($5300, write)==
Mask: $FF00
D~7654 3210
  ---------
  .... .A?B
        | +- 0: Do not swap D0,D1 on writes to $5000-$5200.
        |    1: Swap D0,D1 on writes to $5000-$5200.
        +--- 0: PRG A15/A16=11b
              1: PRG A15/A16 from $5000
 
* This register is not subject to bit-swapping, i.e. the register is not affected by its own bit 0.
* Because reset clears the A bit, games will boot in 32 KiB PRG-ROM bank #3.
=Notes=
* Mapper 163 cartridges should be dumped with $5300=$04 to obtain the correct PRG bank order. To verify that the cartridge is really mapper 163 ...
** ... rule out [[INES Mapper 162]] by writing $04 to $5300 and verifying that $5100.1 does not change the PRG bank;
** ... rule out [[NES 2.0 Mapper 558]] by verifying that $5000 value $01 does not result in a different PRG bank between $5300 values $04 and $05 (because the B bit is bit 1 in mapper 558).
* ''暗黑破坏神 - Diablo'' (NJ037) and its title screen hack ''毁灭之神'' (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware. ''魔兽世界: 恶魔猎人'' (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.
=See also=
* Similar mappers: [[INES Mapper 162]], [[INES Mapper 164]], [[NES 2.0 Mapper 558]]

Latest revision as of 20:26, 17 May 2021

iNES Mapper 163 denotes the 南晶 (Nánjīng) FC-001 circuit board, used on most of their games, including:

  • 牧场物语 - Harvest Moon (NJ011)
  • 水浒神兽 (Shuǐhǔ Shénshòu, NJ019)
  • 暗黑破坏神 - Diablo (NJ037)
  • 轩辕剑外传 之 天之痕 (Xuānyuánjiàn Wàizhuàn zhī Tiānzhīhén, NJ045)
  • Final Fantasy IV - 最终幻想 4꞉ 光与暗 水晶纷争 (NJ098)

Banks

  • CPU $6000-$7FFF: 8 KiB unbanked PRG-RAM, battery-backed
  • CPU $8000-$FFFF: 32 KiB switchable PRG-ROM bank
  • PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM bank, 4 KiB can be automatically switched
  • Nametable mirroring: hard-wired

Registers

All registers are initialized to $00 on reset.

PRG Bank Low/CHR-RAM Switch ($5000, write)

Mask: $FF00

D~7654 3210
  ---------
  C... PPPP
  |    ++++- PRG A18..A15
  +--------- Automatic 4 KiB CHR-RAM switch: when PPU A13=0 (pattern table) ...
              0: CHR A12=PPU A12 (disable auto-switch)
              1: CHR A12=PPU A9 latched on last rise of PPU A13 (enable auto-switch)
  • Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position. This auto-switch behavior is similar to that of mapper 96.
  • Bits 0 and 1 are subject to the Mode register.

PRG Bank High ($5200, write)

Mask: $FF00

D~7654 3210
  ---------
  .... ..PP
         ++- PRG A20..A19
  • Bits 0 and 1 are subject to the Mode register. 1 MiB games connect both ASIC PRG A19 and A20 outputs to ROM A19, effectively exempting this register from the bit-swap.

Feedback Write ($5100-$5101, write)

Mask: $FF01

D~7654 3210  A~FEDC BA98 7654 3210
  ---------    -------------------
  .... .F.E    .... .... .... ...A
        | |                      +- Action on write
        | +- A=0: Value latched
        |    A=1: Value latched, and flip the latched F bit on falling edges of E (i.e. 1->0).
        +--- A=0: Value latched
             A=1: Ignored, previously-latched value either kept or flipped

Feedback Read ($5500-$5501, read)

Mask: $F300

D~7654 3210
  ---------
  .... .F..
        +--- Inverted value of latched F bit
  • 暗黑破坏神 - Diablo (Ànhēi Pòhuàishén, NJ037) only checks that F is read back inverted.
  • 轩辕剑外传 之 天之痕 (Xuānyuánjiàn Wàizhuàn zhī Tiān zhī Hén, NJ045) checks that F is flipped on falling edges of E.

Mode ($5300, write)

Mask: $FF00

D~7654 3210
  ---------
  .... .A?B
        | +- 0: Do not swap D0,D1 on writes to $5000-$5200.
        |    1: Swap D0,D1 on writes to $5000-$5200.
        +--- 0: PRG A15/A16=11b
             1: PRG A15/A16 from $5000
  • This register is not subject to bit-swapping, i.e. the register is not affected by its own bit 0.
  • Because reset clears the A bit, games will boot in 32 KiB PRG-ROM bank #3.

Notes

  • Mapper 163 cartridges should be dumped with $5300=$04 to obtain the correct PRG bank order. To verify that the cartridge is really mapper 163 ...
    • ... rule out INES Mapper 162 by writing $04 to $5300 and verifying that $5100.1 does not change the PRG bank;
    • ... rule out NES 2.0 Mapper 558 by verifying that $5000 value $01 does not result in a different PRG bank between $5300 values $04 and $05 (because the B bit is bit 1 in mapper 558).
  • 暗黑破坏神 - Diablo (NJ037) and its title screen hack 毁灭之神 (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware. 魔兽世界: 恶魔猎人 (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.

See also