INES Mapper 050: Difference between revisions
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[[Category:iNES Mappers| | {{DEFAULTSORT:050}}[[Category:iNES Mappers]][[Category:Mappers with fixed-timing cycle IRQs]][[Category:FDS conversion mappers]] | ||
'''iNES Mapper 050''' denotes the '''N-32''' conversion of ''Super Mario Bros. 2 (J)''. A hack of the [[NES 2.0 Mapper 368|YUNG-08]] conversion, it replaces references to "Mario" with "Romeo". Its PCB code is '''761214'''. | |||
Here are Disch's original notes: | Here are Disch's original notes: | ||
======================== | ======================== | ||
| Line 47: | Line 48: | ||
$0FFF->$1000, and IRQ is generated. The counter appears to be a full 16-bits (so it will not wrap until | $0FFF->$1000, and IRQ is generated. The counter appears to be a full 16-bits (so it will not wrap until | ||
$FFFF) | $FFFF) | ||
The purported 16-bit counter seems unlikely. Both FCEUX and Nestopia disable the counter when it fires. The actual hardware is more likely a 13-bit counter with its MSB inverted into the Famicom's /IRQ line. | |||
Latest revision as of 22:13, 26 August 2019
iNES Mapper 050 denotes the N-32 conversion of Super Mario Bros. 2 (J). A hack of the YUNG-08 conversion, it replaces references to "Mario" with "Romeo". Its PCB code is 761214.
Here are Disch's original notes:
========================
= Mapper 050 =
========================
Example Game:
--------------------------
Super Mario Bros. (JU) (Alt Levels) (SMB2j pirate cart)
Notes:
---------------------------
No PRG-RAM. PRG setup is bizarre, as is the scrambled PRG reg.
Registers:
---------------------------
Range,Mask: $4020-5FFF, $4120
$4020: [.... HLLM]
L,M,H = Low, middle, and high bits of PRG Reg
$4120: [.... ...E] IRQ Enable (0=Disabled, 1=Enabled)
PRG Setup:
---------------------------
$6000 $8000 $A000 $C000 $E000
+-------+-------+-------+-------+-------+
| {$0F} | { 8 } | { 9 } | $4020 | {$0B} |
+-------+-------+-------+-------+-------+
IRQs:
---------------------------
Writing to $4120 with E=0 will disable IRQs, acknowledge the pending IRQ, and reset the IRQ counter to 0.
Writing with E=1 will just enable IRQs (but will not change anything else).
When enabled, The IRQ counter will count up every CPU cycle. When it makes the transition from
$0FFF->$1000, and IRQ is generated. The counter appears to be a full 16-bits (so it will not wrap until
$FFFF)
The purported 16-bit counter seems unlikely. Both FCEUX and Nestopia disable the counter when it fires. The actual hardware is more likely a 13-bit counter with its MSB inverted into the Famicom's /IRQ line.
