User talk:Karatorian/6502 Instruction Set: Difference between revisions
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==Unoffical codes== | |||
Can you also add the stable unofficial codes to this table (perhaps in italics so that you can know the difference)? --[[User:Zzo38|Zzo38]] ([[User talk:Zzo38|talk]]) 19:59, 11 October 2013 (MDT) | |||
Latest revision as of 01:59, 12 October 2013
Existing Versions and Diffs
As far as I know, there are three versions of this document in the wild:
- The unattributed original. (I'll call it 1.00, but it's unnumbered.)
- Revision 1.02 by _Bnu.
- Revision 1.03 by _Gist.
It's implied that there is a 1.01 revision, but I've never seen it.
_Bnu's changes appear to be relatively modest and limited to fixing a few typos (which look rather like OCR errors to me).
--- 6502-100.txt 2013-10-08 22:03:16.000000000 -0400
+++ 6502-102.txt 2013-10-08 22:03:48.000000000 -0400
@@ -1,5 +1,7 @@
6502 Microprocessor
+ Revision 1.02 by _Bnu.
+
Most of the following information has been taking out of the "Commodore 64
Programmers Reference Manual" simply because it was available in electronic
form and there appears to be no difference between this documentation and
@@ -383,7 +385,7 @@
| Zero Page | ADC Oper | 65 | 2 | 3 |
| Zero Page,X | ADC Oper,X | 75 | 2 | 4 |
| Absolute | ADC Oper | 60 | 3 | 4 |
- | Absolute,X | ADC Oper,X | 70 | 3 | 4* |
+ | Absolute,X | ADC Oper,X | 7D | 3 | 4* |
| Absolute,Y | ADC Oper,Y | 79 | 3 | 4* |
| (Indirect,X) | ADC (Oper,X) | 61 | 2 | 6 |
| (Indirect),Y | ADC (Oper),Y | 71 | 2 | 5* |
@@ -710,7 +712,7 @@
| Zero Page | EOR Oper | 45 | 2 | 3 |
| Zero Page,X | EOR Oper,X | 55 | 2 | 4 |
| Absolute | EOR Oper | 40 | 3 | 4 |
- | Absolute,X | EOR Oper,X | 50 | 3 | 4* |
+ | Absolute,X | EOR Oper,X | 5D | 3 | 4* |
| Absolute,Y | EOR Oper,Y | 59 | 3 | 4* |
| (Indirect,X) | EOR (Oper,X) | 41 | 2 | 6 |
| (Indirect),Y | EOR (Oper),Y | 51 | 2 | 5* |
@@ -871,7 +873,7 @@
| Zero Page | ORA Oper | 05 | 2 | 3 |
| Zero Page,X | ORA Oper,X | 15 | 2 | 4 |
| Absolute | ORA Oper | 0D | 3 | 4 |
- | Absolute,X | ORA Oper,X | 1D | 3 | 4* |
+ | Absolute,X | ORA Oper,X | 10 | 3 | 4* |
| Absolute,Y | ORA Oper,Y | 19 | 3 | 4* |
| (Indirect,X) | ORA (Oper,X) | 01 | 2 | 6 |
| (Indirect),Y | ORA (Oper),Y | 11 | 2 | 5 |
@@ -1054,8 +1056,8 @@
+----------------+-----------------------+---------+---------+----------+
| Zero Page | STA Oper | 85 | 2 | 3 |
| Zero Page,X | STA Oper,X | 95 | 2 | 4 |
- | Absolute | STA Oper | 80 | 3 | 4 |
- | Absolute,X | STA Oper,X | 90 | 3 | 5 |
+ | Absolute | STA Oper | 8D | 3 | 4 |
+ | Absolute,X | STA Oper,X | 9D | 3 | 5 |
| Absolute,Y | STA Oper, Y | 99 | 3 | 5 |
| (Indirect,X) | STA (Oper,X) | 81 | 2 | 6 |
| (Indirect),Y | STA (Oper),Y | 91 | 2 | 6 |
@@ -1309,7 +1311,7 @@
5A - Future Expansion 7A - Future Expansion
5B - Future Expansion 7B - Future Expansion
5C - Future Expansion 7C - Future Expansion
- 50 - EOR - Absolute,X 70 - ADC - Absolute,X
+ 5D - EOR - Absolute,X 7D - ADC - Absolute,X
5E - LSR - Absolute,X 7E - ROR - Absolute,X
5F - Future Expansion 7F - Future Expansion
@@ -1326,7 +1328,7 @@
8A - TXA AA - TAX
8B - Future Expansion AB - Future Expansion
8C - STY - Absolute AC - LDY - Absolute
- 80 - STA - Absolute AD - LDA - Absolute
+ 8D - STA - Absolute AD - LDA - Absolute
8E - STX - Absolute AE - LDX - Absolute
8F - Future Expansion AF - Future Expansion
90 - BCC B0 - BCS
@@ -1334,7 +1336,7 @@
92 - Future Expansion B2 - Future Expansion
93 - Future Expansion B3 - Future Expansion
94 - STY - Zero Page,X B4 - LDY - Zero Page,X
- 95 - STA - Zero Page,X BS - LDA - Zero Page,X
+ 95 - STA - Zero Page,X B5 - LDA - Zero Page,X
96 - STX - Zero Page,Y B6 - LDX - Zero Page,Y
97 - Future Expansion B7 - Future Expansion
98 - TYA B8 - CLV
@@ -1342,7 +1344,7 @@
9A - TXS BA - TSX
9B - Future Expansion BB - Future Expansion
9C - Future Expansion BC - LDY - Absolute,X
- 90 - STA - Absolute,X BD - LDA - Absolute,X
+ 9D - STA - Absolute,X BD - LDA - Absolute,X
9E - Future Expansion BE - LDX - Absolute,Y
9F - Future Expansion BF - Future Expansion
_Gist's changes are a little more extensive. A few typos are fixed, but the bulk of the changes are the addition of a summary section at the end.
--- 6502-102.txt 2013-10-08 22:03:48.000000000 -0400
+++ 6502-103.txt 2013-10-08 22:09:28.000000000 -0400
@@ -1,6 +1,7 @@
6502 Microprocessor
Revision 1.02 by _Bnu.
+ Revision 1.03 by _Gist.
Most of the following information has been taking out of the "Commodore 64
Programmers Reference Manual" simply because it was available in electronic
@@ -690,7 +691,7 @@
DEY DEY Decrement index Y by one DEY
- Operation: X - 1 -> Y N Z C I D V
+ Operation: Y - 1 -> Y N Z C I D V
/ / _ _ _ _
(Ref: 7.7)
+----------------+-----------------------+---------+---------+----------+
@@ -745,7 +746,7 @@
INY INY Increment Index Y by one INY
- Operation: X + 1 -> X N Z C I D V
+ Operation: Y + 1 -> Y N Z C I D V
/ / _ _ _ _
(Ref: 7.5)
+----------------+-----------------------+---------+---------+----------+
@@ -1365,7 +1366,7 @@
CE - DEC - Absolute EE - INC - Absolute
CF - Future Expansion EF - Future Expansion
D0 - BNE F0 - BEQ
- D1 - CMP (Indirect@,Y F1 - SBC - (Indirect),Y
+ D1 - CMP (Indirect),Y F1 - SBC - (Indirect),Y
D2 - Future Expansion F2 - Future Expansion
D3 - Future Expansion F3 - Future Expansion
D4 - Future Expansion F4 - Future Expansion
@@ -1738,3 +1739,95 @@
SET_ZERO(src);
AC = (src);
+Summary of 6502 Opcodes
+
+ADC Add to accumulator with carry.
+AND "AND" with accumulator.
+ASL Arithmetic Shift Left. Bit0=0 C=Bit7.
+BCC Branch on Carry Clear.
+BCS Branch on Carry Set.
+BEQ Branch on result Equal (zero).
+BIT Test bits in memory with accumulator.
+BMI Branch on result Minus.
+BNE Branch on result Not Equal (not zero).
+BPL Branch on result Plus.
+BRK Forced BREAK.
+BVC Branch on overflow Clear.
+BVS Branch on overflow Set.
+CLC Clear Carry flag.
+CLD Clear Decimal mode.
+CLI Clear Interrupt disable bit.
+CLV Clear overflow flag.
+CMP Compare with accumulator.
+CPX Compare with X register.
+CPY Compare with Y register.
+DEC Decrement memory by one.
+DEX Decrement X register by one.
+DEY Decrement Y register by one.
+EOR "Exclusive-OR" with accumulator.
+INC Increment memory by one.
+INX Increment X register by one.
+INY Increment Y register by one.
+JMP Unconditional Jump to new address.
+JSR Unconditional Jump, saving return address.
+LDA Load accumulator.
+LDX Load X register.
+LDY Load Y register.
+LSR Logical Shift Right. Bit7=0 C=Bit0.
+NOP No Operation.
+ORA "OR" with accumulator.
+PHA Push Accumulator on stack.
+PHP Push Processor status register on stack.
+PLA Pull Accumulator from stack.
+PLP Pull Processor status register from stack.
+ROL Rotate one bit Left (mem. or acc.). C=Bit7 Bit0=C.
+ROR Rotate one bit Right (mem. or acc.). C=Bit0 Bit7=C.
+RTI Return from Interrupt.
+RTS Return from Subroutine.
+SBC Subtract from accumulator with borrow.
+SEC Set Carry flag.
+SED Set Decimal mode.
+SEI Set Interrupt disable status.
+STA Store Accumulator in memory.
+STX Store X register in memory.
+STY Store Y register in memory.
+TAX Transfer Accumulator to X register.
+TAY Transfer Accumulator to Y register.
+TSX Transfer Stack pointer to X register.
+TXA Transfer X register to Accumulator.
+TXS Transfer X register to Stack pointer.
+TYA Transfer Y register to Accumulator.
+
+The Processor Status Register, "P"
+--- --------- ------ --------- ---
+
+7 6 5 4 3 2 1 0
+N V B D I Z C
+
+7 N Negative
+6 V Overflow
+5 <..Future expansion..>
+4 B BRK command
+3 D Decimal mode
+2 I IRQ disable
+1 Z Zero
+0 C Carry
+
+Addressing Modes of 6502 Assembly Code
+---------- ----- -- ---- -------- ----
+
+LDA #$07 Immediate mode
+LDA $1F Zero page absolute
+LDA $0800 Absolute
+CLC Implied
+JMP ($0036) Indirect absolute
+LDA $FE90,X Absolute indexed (by X)
+LDA $FE90,Y Absolute indexed (by Y)
+LDA $2A,X Zero page indexed
+LDA ($2A,X) Indexed indirect
+LDA ($2A),Y Indirect indexed
+BCC $03 Relative
+BCC $0803 Relative (alternate form)
+LSR A Accumulator
+LSR Accumulator (alternate form)
+
Unoffical codes
Can you also add the stable unofficial codes to this table (perhaps in italics so that you can know the difference)? --Zzo38 (talk) 19:59, 11 October 2013 (MDT)
