NES 2.0 Mapper 444: Difference between revisions
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A~FEDC BA98 7654 3210 | A~FEDC BA98 7654 3210 | ||
------------------- | ------------------- | ||
011. .... ...C MMBA | |||
| ||++- PRG A18..17 | | ||++- PRG A18..17 | ||
| |||+- CHR A17 if submapper bit 0 clear | | |||+- CHR A17 if submapper bit 0 clear | ||
Line 29: | Line 29: | ||
* The inner PRG bank is restricted to 128 KiB. | * The inner PRG bank is restricted to 128 KiB. | ||
* NROM mode forces MMC3's CPU A13 and A14 inputs to GND to make MMC3 bank register 6 apply to the entire CPU $8000-$FFFF range. | * NROM mode forces MMC3's CPU A13 and A14 inputs to GND to make MMC3 bank register 6 apply to the entire CPU $8000-$FFFF range. | ||
==MMC3-compatible registers== | ==MMC3-compatible registers== | ||
Mask: $E001 | Mask: $E001 | ||
See [[MMC3]]. | See [[MMC3]]. |
Revision as of 17:31, 25 May 2021
NES 2.0 Mapper 444 denotes the NC7000M multicart circuit board. Its UNIF board name is BMC-BS-110, which is the name of a different PCB whose name was mixed-up.
The top-right solder pads are relevant for bankswitching and are denoted by Submapper bits. A clear bit represents the upper pad connection:
- Submapper bit 0 (top-rightmost pad): CHR-ROM A17 connected to $6000.0 (clear) or to the MMC3 CHR A17 output (set). Selects whether the MMC3 can address 128 or 256 KiB of CHR data.
- Submapper bit 1 (the top-second-rightmost pad): CHR-ROM A18 connected to $6000.1 (clear) or to $6000.4 (set). Since PRG A18 is also determined by $6000.1, it thus selects whether CHR A18 can be determined separately or not.
Known cartridges:
- 7000-in-1 (CA-004): both bits set (submapper 3)
- Super 8000-in-1: both bits clear (submapper 0)
Outer Bank and Mode Register ($6000-$7FFF, write)
Mask: $E000 A~FEDC BA98 7654 3210 ------------------- 011. .... ...C MMBA | ||++- PRG A18..17 | |||+- CHR A17 if submapper bit 0 clear | ||+-- CHR A18 if submapper bit 1 clear | ++--- Select PRG-ROM mode | 0: MMC3 mode | 1: NROM-256 mode (PRG A13..14=CPU A13..14, PRG A15..16=MMC3 A15..16) | 2: Read solder pads' value in D0/D1 (leftmost pads in picture) | 3: NROM-128 mode (PRG A13=CPU A13, PRG A14..16=MMC3 A14..16) +------ CHR A18 if submapper bit 1 set
- WRAM must be enabled in $A001.7 before writing to this register.
- The inner PRG bank is restricted to 128 KiB.
- NROM mode forces MMC3's CPU A13 and A14 inputs to GND to make MMC3 bank register 6 apply to the entire CPU $8000-$FFFF range.
MMC3-compatible registers
Mask: $E001
See MMC3.