MMC5 pinout

    80    51
    |     |
    .------.
 81-|      |-50
    | MMC5 |
100-|      |-31
    \------'
     |    |
     01   30

Pin	Function	Pin	Function	Pin	Function	Pin	Function
1	AUD0 *1			51	CPU A6
2	AUD1 *1			52	CPU A7
3	AUD2 *1			53	CPU A8
4	VCC			54	CPU A9
5	PPU A0			55	CPU A10
6	PPU A1	31	VRAM /CE	56	PRG RAM VCC	81	NC
7	PPU A2	32	VRAM A10	57	+batt	82	NC
8	PPU A3	33	PPU /WR	58	CPU A11	83	PRG RAM +CE
9	PPU A4	34	PPU /RD	59	CPU A12	84	PPU D0
10	PPU A5	35	/IRQ	60	PRG A13	85	PPU D1
11	PPU A6	36	CPU D0	61	PRG A14	86	PPU D2
12	PPU A7	37	CPU D1	62	PRG A15	87	PPU D3
13	PPU A8	38	CPU D2	63	PRG A16	88	PPU D4
14	PPU A9	39	CPU D3	64	PRG A17	89	PPU D5
15	CHR A10	40	CPU D4	65	PRG A18	90	PPU D6
16	CHR A11	41	CPU D5	66	PRG A19	91	PPU D7
17	CHR A12	42	CPU D6	67	CPU A13	92	NC
18	CHR A13	43	CPU D7	68	CPU A14	93	NC
19	CHR A14	44	VCC	69	PRG RAM A13	94	CHR A0 *2
20	CHR A15	45	CPU A0	70	PRG RAM A14	95	CHR A1 *2
21	CHR A16	46	CPU A1	71	PRG RAM 0 /CE	96	CHR A2 *2
22	CHR A17	47	CPU A2	72	PRG RAM 1 /CE	97	CL3 *2
23	CHR A18	48	CPU A3	73	NC	98	SL3 *2
24	CHR A19	49	CPU A4	74	PRG /CE	99	GND
25	PPU A10	50	CPU A5	75	NC	100	AUD3 *1
26	PPU A11			76	PRG RAM /WE
27	PPU A12			77	NC
28	PPU A13			78	NC
29	NC			79	M2
30	NC			80	GND

• 1: PINS 1,2,3 & 100. Related to sound; more details needed.
• 2: PINS 94 thru 98. These set the cart to either CL or SL mode.

To set to CL mode:

• Connect CHR A0 from the NES to A0 on the CHR ROM.
• Connect CHR A1 from the NES to A1 on the CHR ROM.
• Connect CHR A2 from the NES to A2 on the CHR ROM.
• Connect pins 97 and 98 together.
• Leave pins 94,95 & 96 floating on the MMC5

To set to SL mode:

• Connect pin 94 of the MMC5 to A0 of the CHR ROM.
• Connect pin 95 of the MMC5 to A1 of the CHR ROM.
• Connect pin 96 of the MMC5 to A2 of the CHR ROM.
• Connect pin 98 to ground.
• Leave pin 97 floating.

SL mode allows the MMC5 to perform smooth vertical scrolling in split mode, while CL mode does not. Nearly all MMC5 cartridges use CL mode - it is not known why SL mode was not used instead.