INES Mapper 031: Difference between revisions

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m (→‎Emulator support: OpenEMU is inconsistent about what they call this core, but maybe FCEUX is more technically accurate)
m (→‎Emulator support: MAME goes back at least as far as 0.162 when it incorproated MESS, MESS had it several months prior but history is hard to track down and this is good enough)
Line 46: Line 46:
* [http://tasvideos.org/BizHawk.html BizHawk] 1.11.2
* [http://tasvideos.org/BizHawk.html BizHawk] 1.11.2
* [http://www.fceux.com FCEUX] 2.2.3
* [http://www.fceux.com FCEUX] 2.2.3
* [http://mamedev.org/ MAME] (MESS) 0.174
* [http://mamedev.org/ MAME] 0.162
* [https://www.mesen.ca/ Mesen] 0.9.0
* [https://www.mesen.ca/ Mesen] 0.9.0
* [https://www.qmtpro.com/~nes/nintendulator/ Nintendulator] 0.975
* [https://www.qmtpro.com/~nes/nintendulator/ Nintendulator] 0.975

Revision as of 04:00, 24 August 2018

iNES Mapper 031 represents a mapper created to facilitate cartridge compilations of NSF music. It implements a common subset of the features used by NSFs.

PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.

There is no CHR banking, so it is recommended to use 8 kB CHR-RAM with this mapper.

As with BNROM and UxROM, there is no mirroring, CHR bank, or IRQ control; this mapper has hardwired H or V mirroring.

Examples:

Overview

  • PRG ROM size: Up to 1024 kB
  • PRG ROM bank size: 4 kB
  • PRG RAM: None
  • CHR capacity: 8 kB RAM/ROM
  • CHR bank size: Not bankswitched
  • Nametable mirroring: horizontal or vertical, hard wired.
  • Subject to bus conflicts: No

Registers

PRG bank select $5000-$5FFF

address              data
15      bit       0  7  bit  0
-------------------  ---------
0101 .... .... .AAA  PPPP PPPP
                |||  |||| ||||
                |||  ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address.
                +++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000)

The canonical write position for these registers is $5FF8-$5FFF, as used in NSFs.

At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset.

References

Emulator support

Cartridges: