INES Mapper 031: Difference between revisions
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PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on. | PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on. | ||
CHR | There is no CHR banking, so it is recommended to use 8 kB CHR-RAM with this mapper. | ||
As with [[BNROM]] and [[UxROM]], there is no mirroring, CHR bank, or IRQ control; this mapper | As with [[BNROM]] and [[UxROM]], there is no mirroring, CHR bank, or IRQ control; this mapper has hardwired H or V mirroring. | ||
== Overview == | == Overview == | ||
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* PRG ROM bank size: 4 kB | * PRG ROM bank size: 4 kB | ||
* PRG RAM: None | * PRG RAM: None | ||
* CHR capacity: 8 kB RAM | * CHR capacity: 8 kB RAM/ROM | ||
* CHR bank size: Not bankswitched | * CHR bank size: Not bankswitched | ||
* Nametable [[mirroring]]: horizontal or vertical, hard wired. | * Nametable [[mirroring]]: horizontal or vertical, hard wired. | ||
Revision as of 19:29, 5 August 2015
iNES Mapper 031 represents 2A03 Puritans, a cartridge implementing a variant of the NSF mapper.
PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.
There is no CHR banking, so it is recommended to use 8 kB CHR-RAM with this mapper.
As with BNROM and UxROM, there is no mirroring, CHR bank, or IRQ control; this mapper has hardwired H or V mirroring.
Overview
- PRG ROM size: Up to 1024 kB
- PRG ROM bank size: 4 kB
- PRG RAM: None
- CHR capacity: 8 kB RAM/ROM
- CHR bank size: Not bankswitched
- Nametable mirroring: horizontal or vertical, hard wired.
- Subject to bus conflicts: No
Registers
PRG bank select $5000-$5FFF
address data
15 bit 0 7 bit 0
------------------- ---------
0101 .... .... .AAA PPPP PPPP
||| |||| ||||
||| ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address.
+++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000)
The canonical write position for these registers is $5FF8-$5FFF, as used in NSFs.
At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset.
References
Emulator support
- BizHawk r6492
- MESS r30137
- puNES 0.84
- FCEUX r3094
- Nintendulator 0.975
