Fixed cycle delay: Difference between revisions

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== Delay code ==
Shortest possible CPU code that creates N cycles of delay, depending on constraints.
 
== Code ==
 
All code samples are written for CA65.
 
Assumptions:
* No page wrap occurs during any branch instruction. If a page wrap occurs, it adds +1 cycle for each loop, completely thwarting the accurate delay.
* No interrupt / NMI occurs during the delay code.


Shortest possible CPU code that creates N cycles of delay, depending on constraints.
It is permissible for DMA to steal cycles during the loops.
If you are expecting that to happen, you have to manually
adjust the delay cycle count (and it is in fact possible to do so)
in order to get the correct delay.


All branch instructions assume that no page wrap occurs.
=== Explanations on the requirements ===


Explanations on the requirements:
* @zp_temp means you have a zeropage address that you can write random data into.
* @rts12 means you know a memory address that contains byte $60 (<code>RTS</code>).
* @rts12 means you know a memory address that contains byte $60 (<code>RTS</code>).
* @rts14 means you know a memory address that contains a harmless 2-cycle instruction that fits your constraints (such as <code>CLC</code>, <code>LDA #0</code>, or <code>NOP</code>), followed by <code>RTS</code>.
cycle instruction that fits your constraints (such as <code>LDA $00</code>), followed by <code>RTS</code>.
* @rts15 means you know a memory address that contains a <code>JMP</code> that jumps to another location that contains <code>RTS</code>.
 
* Alternatively, @rts15 means you know a memory address that contains a harmless 3-cycle instruction that fits your constraints (such as <code>LDA $00</code>), followed by <code>RTS</code>.
=== Instructions, addressing modes, byte counts, cycle counts and notes ===
* @A, @X, @Y are local labels.
 
{| class="wikitable testtable"
! scope="col"| Addressing mode
! scope="col"| Instruction type
! scope="col"| Bytes
! scope="col"| Cycle count
! scope="col"| Example instruction
! scope="col"| Notes
|-
! scope="row"| Implied
! scope="row"| Inter-register
| 1 || 2 || <code>TAX</code> || <code>NOP</code> has no side effects. Flag-manipulations like <code>CLC</code>, and <code>SEC</code><code>CLV</code> are used when their effects are desired.
|-
! scope="row"| Implied
! scope="row"| Stack push
| 1 || 3 || <code>PHA</code> || <code>PHP</code> is only paired with <code>PLP</code>.
|-
! scope="row"| Implied
! scope="row"| Stack pop
| 1 || 4 || <code>PLA</code> ||
|-
! scope="row"| Implied
! scope="row"| Return
| 1 || 6 || <code>RTS</code> || Used indirectly when paired with <code>JSR</code>. Similarly for <code>RTI</code>.
|-
! scope="row"| Immediate
! scope="row"|
| 2 || 2 || <code>CMP #$C5</code> || Includes instructions like <code>LDA</code>, <code>LDX</code> and <code>LDY</code>. Other ALU instructions are used in more complex situations.
|-
! scope="row"| Relative
! scope="row"| Branch
| 2 || 2—4 || <code>BCC *+2</code> || Branch takes 3 cycles when taken, 2 otherwise. A page crossing adds +1 cycle when branch is taken, but because of difficulties setting that up, we don't use it.
|-
! scope="row"| Zeropage
! scope="row"| Read, write
| 2 || 3 || <code>LDA $A5</code>
|-
! scope="row"| Zeropage
! scope="row"| RMW
| 2 || 5 || <code>INC @zptemp</code> || Writing to zeropage is only permitted when @zptemp is available. Technically we could save @zptemp into register and restore at end, but it is bytewise inferior to other techniques.
|-
! scope="row"| Zeropage indexed
! scope="row"| Read, write
| 2 || 4 || <code>LDA $EA,X</code> || Inferior to 2 × <code>NOP</code>, but useful for hiding additional code to be executed in a loop.
|-
! scope="row"| Zeropage indexed
! scope="row"| RMW
| 2 || 6 || <code>INC @zptemp,X</code> || Only doable when X is known to be 0, or when entire zeropage can be clobbered.
|-
! scope="row"| Indexed indirect
! scope="row"| Read, write
| 2 || 6 || <code>STA (@ptrtemp,X)</code> || Only doable when X is known to be 0.
|-
! scope="row"| Indexed indirect
! scope="row"| RMW
| 2 || 8 || <code>SLO (@ptrtemp,X)</code> || The most cost-effective instruction. Only doable when X is known to be 0, lest we write to a random address. All instructions in this category are unofficial.
|-
! scope="row"| Indirect indexed
! scope="row"| Read
| 2 || 5—6 || <code>LDA (@ptrtemp),Y</code> || Never used by this code.
|-
! scope="row"| Indirect indexed
! scope="row"| Write
| 2 || 6        || <code>STA (@ptrtemp),Y</code> || Only doable when Y is known to be 0.
|-
! scope="row"| Indirect indexed
! scope="row"| RMW
| 2 || 8        || <code>SLO (@ptrtemp),Y</code> || All instructions in this category are unofficial.
|-
! scope="row"| Absolute
! scope="row"| Jump
| 3 || 3 || <code>JMP *+3</code> ||
|-
! scope="row"| Absolute
! scope="row"| Read, write
| 3 || 4 || <code>LDA $2808</code> || Inferior to 2 × <code>NOP</code>, but can be used carefully to hide additional code to be executed in a loop.
|-
! scope="row"| Absolute
! scope="row"| RMW
| 3 || 6 || <code>INC $4018</code> || Inferior to 3 × <code>NOP</code>.
|-
! scope="row"| Absolute indexed
! scope="row"| Read
| 3 || 4—5 || <code>LDA $0200,X</code> || Inferior to shorter alternatives.
|-
! scope="row"| Absolute indexed
! scope="row"| Write
| 3 || 5 || <code>STA $0200,X</code> || Inferior to shorter alternatives.
|-
! scope="row"| Absolute indexed
! scope="row"| RMW
| 3 || 7 || <code>INC $4018,X</code> || Only doable when writing into the given address is harmless considering the possible values of X.
|-
! scope="row"| Absolute indirect
! scope="row"| Jump
| 3 || 5 || <code>JMP (@ptrtemp)</code> || Inferior to shorter alternatives.
|}
 
{{#css:
  .testtable td{padding:2px} .testtable td pre{padding:2px;margin:2px}
}}
 


=== 2 cycles ===
=== 2 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|1 bytes
!colspan="2"|1 bytes
|-
|-
|<pre>NOP</pre>
|<pre>EA      NOP</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* All instructions cost at least 2 cycles. There is no way to do 1 cycle of delay (though <i>&minus;1 cycles</i> may sometimes appear in branch cost calculations).




=== 3 cycles ===
=== 3 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|1 bytes
!colspan="2"|2 bytes
|-
|<pre>PHA</pre>
|Clobbers S
|-
|-
!colspan="2"|2 bytes
|<pre>C5 C5    CMP $C5</pre>||Clobbers Z&N, and C
|-
|-
|<pre>LDA $00</pre>
|<pre>24 24    BIT $24</pre>||Clobbers Z&N, and V
|Clobbers Z, N and A
|-
|-
|<pre>BIT $00</pre>
|<pre>A5 A5    LDA $A5</pre>||Clobbers A, and Z&N
|Clobbers Z, N and V
|-
|-
|<pre>STA @zptemp</pre>
|<pre>A6 A6    LDX $A6</pre>||Clobbers X, and Z&N
|Requires @zptemp
|-
|-
|<pre>NOP $00</pre>
|<pre>A4 A4    LDY $A4</pre>||Clobbers Y, and Z&N
|Requires support for unofficial opcodes
|-
|-
!colspan="2"|3 bytes
!colspan="2"|3 bytes
|-
|-
|<pre>JMP *+3</pre>
|<pre>4C xx xx JMP *+3</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* Not relocatable means that the target address is hardcoded into the code. In ROM hacking, it sometimes makes sense to move code blobs around, and a hardcoded address makes it difficult to relocate the code. This restriction does not apply to branches, which use relative addressing. It is also assumed to not apply to <code>JSR</code> instructions, as chances are the JSR target is outside the code being relocated.




=== 4 cycles ===
=== 4 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|1 bytes
|-
|<pre>PLA</pre>
|Clobbers Z, N, A and S
|-
!colspan="2"|2 bytes
!colspan="2"|2 bytes
|-
|-
|<pre>NOP
|<pre>EA  ... NOP     × 2</pre>||No requirements
NOP</pre>
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* zp-indexed modes such as <code>LDA $00,X</code> also do 4 cycles, but having side effects, these two-byte instructions are inferior to a simple 2 × <code>NOP</code>.
* There is also an unofficial opcode <code>NOP $00,X</code> (34 00), but there is no reason to use this instruction when the official equivalent has the same performance.




=== 5 cycles ===
=== 5 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|2 bytes
!colspan="2"|3 bytes
|-
|<pre>NOP
PHA</pre>
|Clobbers S
|-
|-
!colspan="2"|3 bytes
|<pre>18      CLC
90 00    BCC *+2</pre>||Clobbers C
|-
|-
|<pre>NOP
|<pre>B8      CLV
LDA $00</pre>
50 00   BVC *+2</pre>||Clobbers V
|Clobbers Z, N and A
|-
|-
|<pre>NOP
|<pre>EA      NOP
BIT $00</pre>
A5 A5    LDA $A5</pre>||Clobbers A, and Z&N
|Clobbers Z, N and V
|-
|-
|<pre>NOP
|<pre>EA      NOP
STA @zptemp</pre>
A6 A6    LDX $A6</pre>||Clobbers X, and Z&N
|Requires @zptemp
|-
|-
|<pre>NOP
|<pre>EA      NOP
NOP $00</pre>
A4 A4    LDY $A4</pre>||Clobbers Y, and Z&N
|Requires support for unofficial opcodes
|-
|-
!colspan="2"|4 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>NOP
|<pre>EA      NOP
JMP *+3</pre>
4C xx xx JMP *+3</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* abs-indexed modes such as <code>LDA $1234,X</code> cause 4 or 5 cycles of delay, depending whether a page wrap occurred. Because you need extra setup code to make sure that a wrap does occur, you do not see this mode in these samples, outside situations where circumstances permit.




=== 6 cycles ===
=== 6 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|2 bytes
|-
|<pre>PHA
PHA</pre>
|Clobbers S
|-
!colspan="2"|3 bytes
!colspan="2"|3 bytes
|-
|-
|<pre>NOP
|<pre>EA  ... NOP     × 3</pre>||No requirements
NOP
NOP</pre>
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* zp-indexed RMW instructions such as <code>INC @zptemp,X</code> do 6 cycles. Unless we know the value of X, it might write into any address between $00-$FF. This option is only useful if the entire range of $00-$FF is free for clobbering with random data, or if X has a known value.
* ix instructions like <code>LDA ($00,X)</code> do 6 cycles, but the value of X decides where a pointer is read from, and said pointer can point anywhere. We only do that when the value of X is known.
* iy instructions like <code>LDA ($00),Y</code> also do 5-6 cycles, but in addition to the note above, we cannot predict whether a wrap occurs or not. So we don't use this mode.
* Absolute RMW instructions like <code>INC $4018</code> do 6 cycles, but weighing 3 bytes with side-effects it would be inferior to 3 × <code>NOP</code>.




=== 7 cycles ===
=== 7 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|2 bytes
!colspan="2"|2 bytes
|-
|-
|<pre>PHP
|<pre>08      PHP
PLP</pre>
28      PLP</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* <code>PHP-PLP</code> is very efficient for 7 cycles of delay, but it does modify stack contents. S register remains unchanged though.
* <code>PLA-PHA</code> does not overwrite any bytes in stack. It just writes back the same byte. But it does clobber A and Z+N. It is not interrupt-unsafe either: If an interrupt happens, the stack byte does get temporarily clobbered, but the value is still in A when the interrupt exits, and gets written back in stack.
* abs-indexed RMW instructions such as <code>INC abs,X</code> do 7 cycles. We only do this when either we know the value of X (for instance, <code>INC $4018,X</code> is safe when X is 0&mdash;7</code>, or when the entire 256-byte page can be safely overwritten with random data.




=== 8 cycles ===
=== 8 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|2 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>PLA
|<pre>EA  ... NOP      × 4</pre>||No requirements
PLA</pre>
|Clobbers Z, N, A and S
|-
|-
|}
* Unofficial ix and iy RMW instructions such as <code>SLO ($00,X)</code> or <code>SLO ($00),Y</code> would do 8 cycles for 2 bytes of code. We only do that if we know X or Y to be zero, and we have a known pointer to safely rewritable data.
=== 9 cycles ===
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|3 bytes
|-
|-
|<pre>TSX
|<pre>EA      NOP
PLA
08      PHP
TXS</pre>
28      PLP</pre>||No requirements
|Clobbers Z, N, A and X
|-
|<pre>NOP
PHA
PHA</pre>
|Clobbers S
|-
|-
|}
* Jumping into the middle of another instruction and thereby reusing code is a very efficient way of reducing code size. Note that all code samples using branches on this page require that no page wrap occurs.
=== 10 cycles ===
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP
NOP
C5 C5    CMP $C5
NOP
28      PLP</pre>||No requirements
NOP</pre>
|Clobbers nothing, requires nothing
|-
|-
|}
|}
* The <code>ROL-ROR</code> sequence preserves the original value of the memory address. Carry is also preserved.




=== 9 cycles ===
=== 11 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>NOP
|<pre>EA  ... NOP     × 2
PHP
08      PHP
PLP</pre>
28      PLP</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}




=== 10 cycles ===
=== 12 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|3 bytes
|-
|-
|<pre>PHA
|<pre>20 xx xx JSR @rts12</pre>||Requires @rts12
PHP
PLP</pre>
|Clobbers S
|-
|-
!colspan="2"|4 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>PHP
|<pre>36 36    ROL $36,X
BIT $00
76 36    ROR $36,X</pre>||Clobbers Z&N
PLP</pre>
|-
|Clobbers nothing, requires nothing
!colspan="2"|5 bytes
|-
|<pre>08      PHP
18      CLC
90 00   BCC *+2
28      PLP</pre>||No requirements
|-
|-
|}
|}
* <code>JSR-RTS</code> causes 12 cycles of delay. But it does write a function return address in the stack, which may be unwanted in some applications. S is not modified.
* Again, <code>ROL-ROR</code> does not have side effects (as long as an interrupt does not happen in the middle), except for Z+N.




=== 11 cycles ===
=== 13 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>PHA
|<pre>EA  ... NOP      × 3
PLA
08      PHP
PLA</pre>
28      PLP</pre>||No requirements
|Clobbers Z, N, A and S
|-
|-
|}
=== 14 cycles ===
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP       \ × 2
NOP
28      PLP       /</pre>||No requirements
PHP
PLP</pre>
|Clobbers nothing, requires nothing
|-
|-
|}
|}




=== 12 cycles ===
=== 15 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|5 bytes
|-
|<pre>08      PHP
BA      TSX
28      PLP
9A      TXS
28      PLP</pre>||Clobbers X
|-
|<pre>C5 C5    CMP $C5
20 xx xx JSR @rts12</pre>||Clobbers Z&N, and C; and requires @rts12
|-
|-
|<pre>JSR @rts12</pre>
|<pre>24 24    BIT $24
|Requires @rts12
20 xx xx JSR @rts12</pre>||Clobbers Z&N, and V; and requires @rts12
|-
|-
|<pre>PLA
|<pre>A5 A5    LDA $A5
PLA
20 xx xx JSR @rts12</pre>||Clobbers A, and Z&N; and requires @rts12
PLA</pre>
|Clobbers Z, N, A and S
|-
|-
!colspan="2"|4 bytes
|<pre>A4 A4    LDY $A4
20 xx xx JSR @rts12</pre>||Clobbers Y, and Z&N; and requires @rts12
|-
|-
|<pre>ROL $00,X
!colspan="2"|6 bytes
ROR $00,X</pre>
|Clobbers Z and N
|-
|-
|<pre>NOP
|<pre>08      PHP
PHA
28      PLP
PHP
EA  ... NOP      × 4</pre>||No requirements
PLP</pre>
|Clobbers S
|-
|-
|}
=== 16 cycles ===
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>NOP
|<pre>EA      NOP
PHP
08      PHP       \ × 2
BIT $00
28      PLP      /</pre>||No requirements
PLP</pre>
|-
|Clobbers nothing, requires nothing
|}
 
 
=== 17 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>08      PHP
48      PHA
A5 A5    LDA $A5
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 13 cycles ===
=== 18 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>PHA
|<pre>EA  ... NOP      × 2
PHA
08      PHP       \ × 2
PHP
28      PLP       /</pre>||No requirements
PLP</pre>
|Clobbers S
|-
|-
|}
=== 19 cycles ===
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP
NOP
28      PLP
NOP
20 xx xx JSR @rts12</pre>||Requires @rts12
PHP
|-
PLP</pre>
!colspan="2"|6 bytes
|Clobbers nothing, requires nothing
|-
|<pre>08      PHP
36 36    ROL $36,X
76 36    ROR $36,X
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 14 cycles ===
=== 20 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>JSR @rts14</pre>
|<pre>A9 2A    LDA #$2A ;hides 'ROL A'
|Requires @rts14
38      SEC
10 FC    BPL *-2</pre>||Clobbers A, Z&N, and C
|-
|-
!colspan="2"|4 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>PHP
|<pre>EA  ... NOP      × 3
PLP
08      PHP       \ × 2
PHP
28      PLP       /</pre>||No requirements
PLP</pre>
|Clobbers nothing, requires nothing
|-
|-
|}
|}




=== 15 cycles ===
=== 21 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|3 bytes
!colspan="2"|5 bytes
|-
|<pre>18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1</pre>||Clobbers A, Z&N, and C
|-
|-
|<pre>JSR @rts15</pre>
|<pre>A2 04    LDX #4
|Requires @rts15
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|-
!colspan="2"|4 bytes
|<pre>A0 04    LDY #4
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|-
|<pre>PHA
!colspan="2"|6 bytes
JSR @rts12</pre>
|Clobbers S and requires @rts12
|-
|-
|<pre>PHA
|<pre>08      PHP      \ × 3
PLA
28      PLP      /</pre>||No requirements
PLA
PLA</pre>
|Clobbers Z, N, A and S
|-
|-
!colspan="2"|5 bytes
|}
 
 
=== 22 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|-
|<pre>LDA $00
|<pre>18      CLC
JSR @rts12</pre>
A9 2A    LDA #$2A ;hides 'ROL A'
|Clobbers Z, N and A and requires @rts12
38      SEC
10 FC    BPL *-2</pre>||Clobbers A, Z&N, and C
|-
|-
|<pre>PHA
|<pre>A2 02    LDX #2
TSX
EA      NOP
PLA
CA      DEX
TXS
10 FC    BPL *-2</pre>||Clobbers X, and Z&N
PLA</pre>
|Clobbers Z, N and X
|-
|-
|<pre>PHP
|<pre>A0 03    LDY #3
TSX
EA      NOP
PLA
88      DEY
TXS
D0 FC    BNE *-2</pre>||Clobbers Y, and Z&N
PLP</pre>
|Clobbers A and X
|-
|-
|<pre>BIT $00
!colspan="2"|7 bytes
JSR @rts12</pre>
|Clobbers Z, N and V and requires @rts12
|-
|-
|<pre>STA @zptemp
|<pre>08      PHP
JSR @rts12</pre>
BA      TSX
|Requires @zptemp and @rts12
08      PHP
28  ... PLP      × 2
9A      TXS
28      PLP</pre>||Clobbers X
|-
|-
|<pre>NOP
|<pre>08      PHP
PHA
C5 C5    CMP $C5
PHA
28      PLP
PHP
20 xx xx JSR @rts12</pre>||Requires @rts12
PLP</pre>
|Clobbers S
|-
|-
|<pre>NOP $00
!colspan="2"|8 bytes
JSR @rts12</pre>
|Requires support for unofficial opcodes and @rts12
|-
|-
|<pre>LDY #130
|<pre>08      PHP      \ × 2
@Y = * - 1
28      PLP      /
; ^ Hides !NOP #imm
EA  ... NOP     × 4</pre>||No requirements
NOP
DEY
BMI @Y</pre>
|Clobbers Z, N and Y and requires support for unofficial opcodes
|-
|-
|}
=== 23 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>NOP
|<pre>18  ... CLC      × 2
NOP
A9 2A    LDA #$2A ;hides 'ROL A'
NOP
90 FD    BCC *-1</pre>||Clobbers A, Z&N, and C
NOP
|-
PHP
|<pre>EA      NOP
PLP</pre>
A2 04    LDX #4
|Clobbers nothing, requires nothing
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA      NOP
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>EA      NOP
08      PHP       \ × 3
28      PLP       /</pre>||No requirements
|-
|-
|}
|}




=== 16 cycles ===
=== 24 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|4 bytes
|-
|-
|<pre>NOP
|<pre>A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts14</pre>
10 FD    BPL *-1</pre>||Clobbers A, Z&N, and C
|Requires @rts14
|-
!colspan="2"|6 bytes
|-
|<pre>20 xx xx JSR @rts12× 2</pre>||Requires @rts12
|-
!colspan="2"|7 bytes
|-
|<pre>A6 A6    LDX $A6
A2 04    LDX #4
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|-
|<pre>PLA
|<pre>A4 A4    LDY $A4
PLA
A0 04    LDY #4
PLA
88      DEY
PLA</pre>
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|Clobbers Z, N, A and S
|-
|-
!colspan="2"|5 bytes
!colspan="2"|8 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP
PHP
C5 C5    CMP $C5
PLP
28      PLP       \ × 2
PHP
08      PHP       /
PLP</pre>
28      PLP</pre>||No requirements
|Clobbers nothing, requires nothing
|-
|-
|}
|}




=== 17 cycles ===
=== 25 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|7 bytes
|-
|<pre>98      TYA
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
A8      TAY</pre>||Clobbers A, and Z&N
|-
|<pre>EA  ... NOP      × 2
A2 04    LDX #4
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA  ... NOP      × 2
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|-
|<pre>NOP
!colspan="2"|8 bytes
JSR @rts15</pre>
|Requires @rts15
|-
|-
|<pre>PHA
|<pre>EA  ... NOP      × 2
JSR @rts14</pre>
08      PHP      \ × 3
|Clobbers S and requires @rts14
28      PLP      /</pre>||No requirements
|-
|-
|}
=== 26 cycles ===
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>LDA $00
|<pre>18      CLC
JSR @rts14</pre>
A9 0A    LDA #$0A ;hides 'ASL A'
|Clobbers Z, N and A and requires @rts14
10 FD    BPL *-1</pre>||Clobbers A, Z&N, and C
|-
|<pre>A2 04    LDX #4
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
|<pre>A0 05    LDY #5
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|-
|<pre>BIT $00
!colspan="2"|7 bytes
JSR @rts14</pre>
|Clobbers Z, N and V and requires @rts14
|-
|-
|<pre>STA @zptemp
|<pre>EA      NOP
JSR @rts14</pre>
20 xx xx JSR @rts12× 2</pre>||Requires @rts12
|Requires @zptemp and @rts14
|-
|-
|<pre>PHA
!colspan="2"|8 bytes
PHP
PLP
PHP
PLP</pre>
|Clobbers S
|-
|-
|<pre>NOP $00
|<pre>08      PHP
JSR @rts14</pre>
48      PHA
|Requires support for unofficial opcodes and @rts14
36 36    ROL $36,X
76 36    ROR $36,X
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
=== 27 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>PHP
|<pre>A5 A5    LDA $A5
PLP
A9 0A    LDA #$0A ;hides 'ASL A'
PHP
10 FD    BPL *-1</pre>||Clobbers A, Z&N, and C
BIT $00
|-
PLP</pre>
!colspan="2"|7 bytes
|Clobbers nothing, requires nothing
|-
|<pre>48      PHA
A9 2A    LDA #$2A ;hides 'ROL A'
38      SEC
10 FC    BPL *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 2A    LDA #$2A ;hides 'ROL A'
38      SEC
10 FC    BPL *-2
28      PLP</pre>||Clobbers A
|-
|<pre>24 2C    BIT <$2C ;hides 'BIT $FDA2'
A2 FD    LDX #253
E8      INX
D0 FA    BNE *-4</pre>||Clobbers X, Z&N, and V
|-
|<pre>24 2C    BIT <$2C ;hides 'BIT $FDA0'
A0 FD    LDY #253
C8      INY
D0 FA    BNE *-4</pre>||Clobbers Y, Z&N, and V
|-
|<pre>A4 AC    LDY <$AC ;hides 'LDY $82A2'
A2 82    LDX #130
CA      DEX
30 FA    BMI *-4</pre>||Clobbers X, Y, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>EA  ... NOP      × 3
A2 04    LDX #4
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA  ... NOP      × 3
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|<pre>24 24    BIT $24
20 xx xx JSR @rts12× 2</pre>||Clobbers Z&N, and V; and requires @rts12
|-
|<pre>20 xx xx JSR @rts12
08      PHP
BA      TSX
28      PLP
9A      TXS
28      PLP</pre>||Clobbers X; and requires @rts12
|-
!colspan="2"|9 bytes
|-
|<pre>EA  ... NOP      × 3
08      PHP      \ × 3
28      PLP      /</pre>||No requirements
|-
|-
|}
|}




=== 18 cycles ===
=== 28 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|6 bytes
|-
|<pre>38  ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1</pre>||Clobbers A, Z&N, and C
|-
|<pre>EA      NOP
A2 04    LDX #4
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA      NOP
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>48      PHA
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 04    LDX #4
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
|-
|<pre>PHA
!colspan="2"|8 bytes
JSR @rts15</pre>
|Clobbers S and requires @rts15
|-
|-
|<pre>PLA
|<pre>08      PHP      \ × 4
JSR @rts14</pre>
28      PLP      /</pre>||No requirements
|Clobbers Z, N, A and S and requires @rts14
|-
|-
!colspan="2"|5 bytes
|}
 
 
=== 29 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA      NOP
90 FC    BCC *-2</pre>||Clobbers A, Z&N, and C
|-
|-
|<pre>LDA $00
|<pre>A2 04    LDX #4
JSR @rts15</pre>
EA      NOP
|Clobbers Z, N and A and requires @rts15
CA      DEX
D0 FC    BNE *-2</pre>||Clobbers X, and Z&N
|-
|-
|<pre>BIT $00
|<pre>A0 04    LDY #4
JSR @rts15</pre>
EA      NOP
|Clobbers Z, N and V and requires @rts15
88      DEY
D0 FC    BNE *-2</pre>||Clobbers Y, and Z&N
|-
|-
|<pre>NOP
!colspan="2"|8 bytes
NOP
JSR @rts14</pre>
|Requires @rts14
|-
|-
|<pre>STA @zptemp
|<pre>48      PHA
JSR @rts15</pre>
18      CLC
|Requires @zptemp and @rts15
A9 2A    LDA #$2A ;hides 'ROL A'
38      SEC
10 FC    BPL *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
|-
|<pre>PHA
|<pre>08      PHP
PHA
18      CLC
JSR @rts12</pre>
A9 2A    LDA #$2A ;hides 'ROL A'
|Clobbers S and requires @rts12
38      SEC
10 FC    BPL *-2
28      PLP</pre>||Clobbers A
|-
|-
|<pre>NOP
|<pre>08      PHP
PLA
A2 02    LDX #2
PLA
EA      NOP
PLA
CA      DEX
PLA</pre>
10 FC    BPL *-2
|Clobbers Z, N, A and S
28      PLP</pre>||Clobbers X
|-
|-
|<pre>NOP $00
|<pre>08      PHP
JSR @rts15</pre>
A0 03    LDY #3
|Requires support for unofficial opcodes and @rts15
EA      NOP
88      DEY
D0 FC    BNE *-2
28      PLP</pre>||Clobbers Y
|-
|-
|<pre>LDY #130
!colspan="2"|9 bytes
@Y = * - 1
; ^ Hides !NOP #imm
NOP $EA ;hides 'NOP'
DEY
BMI @Y</pre>
|Clobbers Z, N and Y and requires support for unofficial opcodes
|-
|-
|<pre>LDX #130
|<pre>08      PHP
@X = * - 1
28      PLP
; ^ Hides !NOP #imm
08      PHP
NOP $EA ;hides 'NOP'
C5 C5    CMP $C5
DEX
28      PLP
BMI @X</pre>
20 xx xx JSR @rts12</pre>||Requires @rts12
|Clobbers Z, N and X and requires support for unofficial opcodes
|-
|-
!colspan="2"|6 bytes
!colspan="2"|10 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP
NOP
C5 C5    CMP $C5
PHP
28      PLP
PLP
08      PHP
PHP
36 36    ROL $36,X
PLP</pre>
76 36    ROR $36,X
|Clobbers nothing, requires nothing
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 19 cycles ===
=== 30 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|4 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>PLA
|<pre>98      TYA
JSR @rts15</pre>
A0 05    LDY #5
|Clobbers Z, N, A and S and requires @rts15
88      DEY
D0 FD    BNE *-1
A8      TAY</pre>||Clobbers A, and Z&N
|-
|-
!colspan="2"|5 bytes
|<pre>EA  ... NOP      × 2
A2 04    LDX #4
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
|-
|<pre>PHP
|<pre>EA  ... NOP      × 2
PLP
A0 05    LDY #5
JSR @rts12</pre>
88      DEY
|Requires @rts12
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|-
|<pre>NOP
!colspan="2"|8 bytes
NOP
JSR @rts15</pre>
|Requires @rts15
|-
|-
|<pre>PHA
|<pre>48      PHA
PLA
18  ... CLC      × 2
PLA
A9 2A    LDA #$2A ;hides 'ROL A'
PLA
90 FD    BCC *-1
PLA</pre>
68      PLA</pre>||Clobbers Z&N, and C
|Clobbers Z, N, A and S
|-
|-
|<pre>NOP
|<pre>08      PHP
PHA
18  ... CLC      × 2
JSR @rts14</pre>
A9 2A    LDA #$2A ;hides 'ROL A'
|Clobbers S and requires @rts14
90 FD    BCC *-1
28      PLP</pre>||Clobbers A
|-
|-
|<pre>LDY #130
|<pre>EA      NOP
@Y = * - 1
08      PHP
; ^ Hides !NOP #imm
A2 04    LDX #4
NOP $EA,X ;hides 'NOP'
CA      DEX
DEY
D0 FD    BNE *-1
BMI @Y</pre>
28      PLP</pre>||Clobbers X
|Clobbers Z, N and Y and requires support for unofficial opcodes
|-
|-
|<pre>LDX #130
|<pre>EA      NOP
@X = * - 1
08      PHP
; ^ Hides !NOP #imm
A0 04    LDY #4
NOP $EA,X ;hides 'NOP'
88      DEY
DEX
D0 FD    BNE *-1
BMI @X</pre>
28      PLP</pre>||Clobbers Y
|Clobbers Z, N and X and requires support for unofficial opcodes
|-
|-
!colspan="2"|6 bytes
!colspan="2"|9 bytes
|-
|-
|<pre>PHP
|<pre>08      PHP
ROL $00,X
48      PHA
ROR $00,X
18      CLC
PLP</pre>
A9 6A    LDA #$6A ;hides 'ROR A'
|Clobbers nothing, requires nothing
90 FD    BCC *-1
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 20 cycles ===
=== 31 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>NOP
|<pre>18      CLC
PHA
A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts15</pre>
90 FD    BCC *-1</pre>||Clobbers A, Z&N, and C
|Clobbers S and requires @rts15
|-
|<pre>A2 05    LDX #5
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
|<pre>A0 06    LDY #6
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|6 bytes
|-
|<pre>48      PHA
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28      PLP</pre>||Clobbers A
|-
!colspan="2"|8 bytes
|-
|<pre>08      PHP
28      PLP
20 xx xx JSR @rts12× 2</pre>||Requires @rts12
|-
!colspan="2"|9 bytes
|-
|-
|<pre>PLA
|<pre>08      PHP
PLA
A6 A6    LDX $A6
PLA
A2 04    LDX #4
PLA
CA      DEX
PLA</pre>
D0 FD    BNE *-1
|Clobbers Z, N, A and S
28      PLP</pre>||Clobbers X
|-
|-
|<pre>PHA
|<pre>08      PHP
PHA
A4 A4    LDY $A4
JSR @rts14</pre>
A0 04    LDY #4
|Clobbers S and requires @rts14
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
|-
|<pre>LDY #130
!colspan="2"|10 bytes
@Y = * - 1
; ^ Hides !NOP #imm
NOP $EA44 ;hides 'NOP zp'
DEY
BMI @Y</pre>
|Clobbers Z, N and Y and requires support for unofficial opcodes
|-
|-
|<pre>LDX #130
|<pre>08      PHP
@X = * - 1
36 36    ROL $36,X \ × 2
; ^ Hides !NOP #imm
76 36    ROR $36,X /
NOP $EA44 ;hides 'NOP zp'
28      PLP</pre>||No requirements
DEX
BMI @X</pre>
|Clobbers Z, N and X and requires support for unofficial opcodes
|-
|-
|}
=== 32 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>NOP
|<pre>A2 05    LDX #5 ;hides 'ORA zp'
LDA $00
CA      DEX ;first loop only
JSR @rts15</pre>
CA      DEX
|Clobbers Z, N and A and requires @rts15
D0 FB    BNE *-3</pre>||Clobbers A, X, and Z&N
|-
|<pre>A0 05    LDY #5 ;hides 'ORA zp'
88      DEY ;first loop only
88      DEY
D0 FB    BNE *-3</pre>||Clobbers A, Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>A9 2A    LDA #$2A ;hides 'ROL A'
EA  ... NOP      × 3
10 FA    BPL *-4</pre>||Clobbers A, Z&N, and C
|-
!colspan="2"|8 bytes
|-
|<pre>EA      NOP
98      TYA
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
A8      TAY</pre>||Clobbers A, and Z&N
|-
|<pre>A6 A6    LDX $A6
A2 04    LDX #4
EA      NOP
CA      DEX
D0 FC    BNE *-2</pre>||Clobbers X, and Z&N
|-
|<pre>A4 A4    LDY $A4
A0 04    LDY #4
EA      NOP
88      DEY
D0 FC    BNE *-2</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|9 bytes
|-
|<pre>48      PHA
98      TYA
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
A8      TAY
68      PLA</pre>||Clobbers Z&N
|-
|<pre>08      PHP
98      TYA
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
A8      TAY
28      PLP</pre>||Clobbers A
|-
|<pre>EA  ... NOP      × 2
08      PHP
A2 04    LDX #4
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA  ... NOP      × 2
08      PHP
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
|-
|<pre>TSX
!colspan="2"|10 bytes
PLA
PLA
PLA
PLA
TXS</pre>
|Clobbers Z, N, A and X
|-
|-
|<pre>NOP
|<pre>08      PHP
BIT $00
48      PHA
JSR @rts15</pre>
18  ... CLC      × 2
|Clobbers Z, N and V and requires @rts15
A9 6A    LDA #$6A ;hides 'ROR A'
90 FD    BCC *-1
68      PLA
28      PLP</pre>||No requirements
|-
|-
|<pre>NOP
|}
NOP
 
NOP
 
JSR @rts14</pre>
=== 33 cycles ===
|Requires @rts14
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|-
|<pre>NOP
|<pre>18  ... CLC      × 2
STA @zptemp
A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts15</pre>
90 FD    BCC *-1</pre>||Clobbers A, Z&N, and C
|Requires @zptemp and @rts15
|-
|-
|<pre>PHA
|<pre>EA      NOP
PHA
A2 05    LDX #5
PHP
CA      DEX
PLP
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
PHP
PLP</pre>
|Clobbers S
|-
|-
|<pre>NOP
|<pre>EA      NOP
NOP $00
A0 06    LDY #6
JSR @rts15</pre>
88      DEY
|Requires support for unofficial opcodes and @rts15
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|-
!colspan="2"|7 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>NOP
|<pre>48      PHA
NOP
18      CLC
NOP
A9 0A    LDA #$0A ;hides 'ASL A'
PHP
10 FD    BPL *-1
PLP
68      PLA</pre>||Clobbers Z&N, and C
PHP
|-
PLP</pre>
|<pre>08      PHP
|Clobbers nothing, requires nothing
18      CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 04    LDX #4
CA      DEX
10 FD    BPL *-1
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>EA      NOP
08      PHP
28      PLP
20 xx xx JSR @rts12× 2</pre>||Requires @rts12
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP      \ × 2
28      PLP      /
08      PHP
36 36    ROL $36,X
76 36    ROR $36,X
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 21 cycles ===
=== 34 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>LDY #4
|<pre>A9 0A    LDA #$0A ;hides 'ASL A'
@Y:
18      CLC
DEY
10 FC    BPL *-2</pre>||Clobbers A, Z&N, and C
BNE @Y</pre>
|-
|Clobbers Z, N and Y
|<pre>A0 88    LDY #136 ;hides 'DEY'
88      DEY
30 FC    BMI *-2</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>A6 A6    LDX $A6
A2 05    LDX #5
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>C5 C5    CMP $C5
48      PHA
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|-
|<pre>LDX #4
|<pre>08      PHP
@X:
A5 A5    LDA $A5
DEX
A9 0A    LDA #$0A ;hides 'ASL A'
BNE @X</pre>
10 FD    BPL *-1
|Clobbers Z, N and X
28      PLP</pre>||Clobbers A
|-
|-
|<pre>PHP
!colspan="2"|9 bytes
PLP
JSR @rts14</pre>
|Requires @rts14
|-
|-
|<pre>PHA
|<pre>08      PHP
PHA
48      PHA
JSR @rts15</pre>
A9 2A    LDA #$2A ;hides 'ROL A'
|Clobbers S and requires @rts15
38      SEC
10 FC    BPL *-2
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
=== 35 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>PHP
|<pre>A9 2A    LDA #$2A ;hides 'ROL A'
PLP
08      PHP
PHP
28      PLP
PLP
10 FB    BPL *-3</pre>||Clobbers A, Z&N, and C
PHP
|-
PLP</pre>
|<pre>A2 F8    LDX #248 ;hides 'SED'
|Clobbers nothing, requires nothing
E8  ... INX      × 2
D0 FB    BNE *-3</pre>||Clobbers X, Z&N, and D
|-
|<pre>A0 88    LDY #136 ;hides 'DEY'
88  ... DEY      × 2
30 FB    BMI *-3</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>98      TYA
A0 06    LDY #6
88      DEY
D0 FD    BNE *-1
A8      TAY</pre>||Clobbers A, and Z&N
|-
|<pre>EA  ... NOP      × 2
A2 05    LDX #5
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>48      PHA
38  ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
38  ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28      PLP</pre>||Clobbers A
|-
|<pre>EA      NOP
08      PHP
A2 04    LDX #4
CA      DEX
10 FD    BPL *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA      NOP
08      PHP
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
48      PHA
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 22 cycles ===
=== 36 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>PHP
|<pre>A9 E9    LDA #$E9 ;hides 'SBC #$2A'
PLP
2A      ROL A ;first loop only
JSR @rts15</pre>
B0 FC    BCS *-2</pre>||Clobbers A, Z&N, C, and V
|Requires @rts15
|-
|<pre>A2 07    LDX #7
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>A0 06    LDY #6
88      DEY
10 FD    BPL *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|6 bytes
|-
|<pre>38      SEC
A9 0A    LDA #$0A ;hides 'ASL A'
38      SEC
10 FC    BPL *-2</pre>||Clobbers A, Z&N, and C
|-
!colspan="2"|8 bytes
|-
|<pre>48      PHA
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA      NOP
90 FC    BCC *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA      NOP
90 FC    BCC *-2
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 04    LDX #4
EA      NOP
CA      DEX
D0 FC    BNE *-2
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 04    LDY #4
EA      NOP
88      DEY
D0 FC    BNE *-2
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>20 xx xx JSR @rts12× 3</pre>||Requires @rts12
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
38      SEC
10 FC    BPL *-2
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 37 cycles ===
{| class="wikitable testtable"
!colspan="2"|7 bytes
|-
|<pre>A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
18      CLC
10 FC    BPL *-2</pre>||Clobbers A, Z&N, and C
|-
|<pre>A2 04    LDX #4
EA  ... NOP      × 2
CA      DEX
D0 FB    BNE *-3</pre>||Clobbers X, and Z&N
|-
|<pre>A0 04    LDY #4
EA  ... NOP      × 2
88      DEY
D0 FB    BNE *-3</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>EA      NOP
98      TYA
A0 06    LDY #6
88      DEY
D0 FD    BNE *-1
A8      TAY</pre>||Clobbers A, and Z&N
|-
|-
|<pre>PLA
!colspan="2"|9 bytes
PLA
JSR @rts14</pre>
|Clobbers Z, N, A and S and requires @rts14
|-
|-
|<pre>LDY #130
|<pre>48      PHA
@Y = * - 1
98      TYA
; ^ Hides !NOP #imm
A0 05    LDY #5
.byte $0C,$E6,@zp_temp ;NOP abs; hides 'INC @zp_temp'
88      DEY
DEY
D0 FD    BNE *-1
BMI @Y</pre>
A8      TAY
|Clobbers Z, N and Y and requires support for unofficial opcodes and @zptemp
68      PLA</pre>||Clobbers Z&N
|-
|-
|<pre>LDX #130
|<pre>08      PHP
@X = * - 1
98      TYA
; ^ Hides !NOP #imm
A0 05    LDY #5
.byte $0C,$E6,@zp_temp ;NOP abs; hides 'INC @zp_temp'
88      DEY
DEX
D0 FD    BNE *-1
BMI @X</pre>
A8      TAY
|Clobbers Z, N and X and requires support for unofficial opcodes and @zptemp
28      PLP</pre>||Clobbers A
|-
|-
|<pre>EA  ... NOP      × 2
08      PHP
A2 04    LDX #4
CA      DEX
10 FD    BPL *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA  ... NOP      × 2
08      PHP
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
18  ... CLC      × 2
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68      PLA
28      PLP</pre>||No requirements
|-
|}
=== 38 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>LDY #3
|<pre>38      SEC
@Y:
A9 69    LDA #$69 ;hides 'ADC #$EA'
NOP
EA      NOP ;first loop only
DEY
B0 FC    BCS *-2</pre>||Clobbers A, Z&N, C, and V
BNE @Y</pre>
|-
|Clobbers Z, N and Y
|<pre>EA      NOP
A2 07    LDX #7
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA      NOP
A0 06    LDY #6
88      DEY
10 FD    BPL *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>48      PHA
18      CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
18      CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
28      PLP</pre>||Clobbers A
|-
|-
|<pre>LDX #3
|<pre>08      PHP
@X:
A2 05    LDX #5
NOP
CA      DEX
DEX
10 FD    BPL *-1
BNE @X</pre>
28      PLP</pre>||Clobbers X
|Clobbers Z, N and X
|-
|-
|<pre>PHA
|<pre>08      PHP
PHP
A0 06    LDY #6
PLP
88      DEY
JSR @rts12</pre>
D0 FD    BNE *-1
|Clobbers S and requires @rts12
28      PLP</pre>||Clobbers Y
|-
|-
|<pre>NOP
!colspan="2"|8 bytes
PLA
PLA
PLA
PLA
PLA</pre>
|Clobbers Z, N, A and S
|-
|-
|<pre>NOP
|<pre>08      PHP
PHA
48      PHA
PHA
A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts14</pre>
10 FD    BPL *-1
|Clobbers S and requires @rts14
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 39 cycles ===
{| class="wikitable testtable"
!colspan="2"|4 bytes
|-
|<pre>A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1</pre>||Clobbers A, Z&N, and C
|-
|-
!colspan="2"|7 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>PHP
|<pre>A6 A6    LDX $A6
BIT $00
A2 07    LDX #7
PLP
CA      DEX
JSR @rts12</pre>
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|Requires @rts12
|-
|<pre>A4 A4    LDY $A4
A0 06    LDY #6
88      DEY
10 FD    BPL *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>98      TYA
A0 88    LDY #136 ;hides 'DEY'
88  ... DEY      × 2
30 FB    BMI *-3
A8      TAY</pre>||Clobbers A, and Z&N
|-
|<pre>08      PHP
A2 05    LDX #5 ;hides 'ORA zp'
CA      DEX ;first loop only
CA      DEX
D0 FB    BNE *-3
28      PLP</pre>||Clobbers A, and X
|-
|<pre>08      PHP
A0 05    LDY #5 ;hides 'ORA zp'
88      DEY ;first loop only
88      DEY
D0 FB    BNE *-3
28      PLP</pre>||Clobbers A, and Y
|-
!colspan="2"|9 bytes
|-
|<pre>48      PHA
A9 2A    LDA #$2A ;hides 'ROL A'
EA  ... NOP      × 3
10 FA    BPL *-4
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 2A    LDA #$2A ;hides 'ROL A'
EA  ... NOP      × 3
10 FA    BPL *-4
28      PLP</pre>||Clobbers A
|-
!colspan="2"|10 bytes
|-
|<pre>EA      NOP
48      PHA
98      TYA
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
A8      TAY
68      PLA</pre>||Clobbers Z&N
|-
|<pre>08      PHP
A6 A6    LDX $A6
A2 04    LDX #4
EA      NOP
CA      DEX
D0 FC    BNE *-2
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A4 A4    LDY $A4
A0 04    LDY #4
EA      NOP
88      DEY
D0 FC    BNE *-2
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|11 bytes
|-
|<pre>08      PHP
48      PHA
98      TYA
A0 04    LDY #4
88      DEY
D0 FD    BNE *-1
A8      TAY
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 40 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>A2 05    LDX #5 ;hides 'ORA zp'
EA      NOP
CA      DEX
D0 FB    BNE *-3</pre>||Clobbers A, X, and Z&N
|-
|-
|<pre>PHP
|<pre>A0 05    LDY #5 ;hides 'ORA zp'
PHA
EA      NOP
TSX
88      DEY
PLA
D0 FB    BNE *-3</pre>||Clobbers A, Y, and Z&N
TXS
PLA
PLP</pre>
|Clobbers X
|-
|-
|<pre>NOP
!colspan="2"|7 bytes
NOP
NOP
NOP
JSR @rts14</pre>
|Requires @rts14
|-
|-
|<pre>NOP
|<pre>98      TYA
PHA
A0 06    LDY #6
PHA
88      DEY
PHP
10 FD    BPL *-1
PLP
A8      TAY</pre>||Clobbers A, and Z&N
PHP
PLP</pre>
|Clobbers S
|-
|-
|<pre>PHP
|<pre>EA  ... NOP      × 2
LDY #130
A2 07    LDX #7
@Y = * - 1
CA      DEX
; ^ Hides !NOP #imm
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
NOP
DEY
BMI @Y
PLP</pre>
|Clobbers Y and requires support for unofficial opcodes
|-
|-
|<pre>SEC
|<pre>EA  ... NOP      × 2
LDA #130
A0 06    LDY #6
@A = * - 1
88      DEY
; ^ Hides !NOP #imm
10 FD    BPL *-1</pre>||Clobbers Y, and Z&N
NOP $EA44 ;hides 'NOP zp'
SBC #1
BMI @A</pre>
|Clobbers C, Z, N and A and requires support for unofficial opcodes
|-
|-
!colspan="2"|8 bytes
!colspan="2"|8 bytes
|-
|-
|<pre>NOP
|<pre>48      PHA
NOP
18  ... CLC      × 2
NOP
A9 0A    LDA #$0A ;hides 'ASL A'
NOP
90 FD    BCC *-1
PHP
68      PLA</pre>||Clobbers Z&N, and C
PLP
|-
PHP
|<pre>08      PHP
PLP</pre>
18  ... CLC      × 2
|Clobbers nothing, requires nothing
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
28      PLP</pre>||Clobbers A
|-
|<pre>EA      NOP
08      PHP
A2 05    LDX #5
CA      DEX
10 FD    BPL *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA      NOP
08      PHP
A0 06    LDY #6
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
48      PHA
18      CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 23 cycles ===
=== 41 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>PLA
|<pre>38      SEC
PLA
A9 4A    LDA #$4A ;hides 'LSR A'
JSR @rts15</pre>
D0 FD    BNE *-1</pre>||Clobbers A, Z&N, and C
|Clobbers Z, N, A and S and requires @rts15
|-
|<pre>A2 08    LDX #8
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>A0 08    LDY #8
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>48      PHA
A9 0A    LDA #$0A ;hides 'ASL A'
18      CLC
10 FC    BPL *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 0A    LDA #$0A ;hides 'ASL A'
18      CLC
10 FC    BPL *-2
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A0 88    LDY #136 ;hides 'DEY'
88      DEY
30 FC    BMI *-2
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
A6 A6    LDX $A6
A2 05    LDX #5
CA      DEX
10 FD    BPL *-1
28      PLP</pre>||Clobbers X
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 42 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>A5 A5    LDA $A5
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1</pre>||Clobbers A, Z&N, and C
|-
!colspan="2"|7 bytes
|-
|<pre>EA      NOP
A2 05    LDX #5 ;hides 'ORA zp'
EA      NOP
CA      DEX
D0 FB    BNE *-3</pre>||Clobbers A, X, and Z&N
|-
|<pre>EA      NOP
A0 05    LDY #5 ;hides 'ORA zp'
EA      NOP
88      DEY
D0 FB    BNE *-3</pre>||Clobbers A, Y, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>48      PHA
A9 2A    LDA #$2A ;hides 'ROL A'
08      PHP
28      PLP
10 FB    BPL *-3
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 2A    LDA #$2A ;hides 'ROL A'
08      PHP
28      PLP
10 FB    BPL *-3
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 F8    LDX #248 ;hides 'SED'
E8  ... INX      × 2
D0 FB    BNE *-3
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 88    LDY #136 ;hides 'DEY'
88  ... DEY      × 2
30 FB    BMI *-3
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>48      PHA
98      TYA
A0 06    LDY #6
88      DEY
D0 FD    BNE *-1
A8      TAY
68      PLA</pre>||Clobbers Z&N
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
38  ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 43 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>38  ... SEC      × 2
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1</pre>||Clobbers A, Z&N, and C
|-
|<pre>A2 05    LDX #5
EA      NOP
CA      DEX
10 FC    BPL *-2</pre>||Clobbers X, and Z&N
|-
|<pre>A0 06    LDY #6
EA      NOP
88      DEY
D0 FC    BNE *-2</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>48      PHA
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A      ROL A ;first loop only
B0 FC    BCS *-2
68      PLA</pre>||Clobbers Z&N, C, and V
|-
|-
|<pre>LDX #130
|<pre>08      PHP
@X = * - 1
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
; ^ Hides !NOP #imm
2A      ROL A ;first loop only
NOP $4848 ;hides two 'PHA's
B0 FC    BCS *-2
DEX
28      PLP</pre>||Clobbers A
BMI @X</pre>
|Clobbers Z, N, X and S and requires support for unofficial opcodes
|-
|-
|<pre>LDY #130
|<pre>08      PHP
@Y = * - 1
A2 07    LDX #7
; ^ Hides !NOP #imm
CA      DEX
NOP $4848 ;hides two 'PHA's
D0 FD    BNE *-1
DEY
28      PLP</pre>||Clobbers X
BMI @Y</pre>
|Clobbers Z, N, Y and S and requires support for unofficial opcodes
|-
|-
|<pre>08      PHP
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|8 bytes
|-
|<pre>48      PHA
38      SEC
A9 0A    LDA #$0A ;hides 'ASL A'
38      SEC
10 FC    BPL *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
18      CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA      NOP
90 FC    BCC *-2
68      PLA
28      PLP</pre>||No requirements
|-
|}
=== 44 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>TSX
|<pre>A9 0A    LDA #$0A ;hides 'ASL A'
PLA
EA  ... NOP      × 2
TXS
10 FB    BPL *-3</pre>||Clobbers A, Z&N, and C
JSR @rts15</pre>
|-
|Clobbers Z, N, A and X and requires @rts15
|<pre>A0 88    LDY #136 ;hides 'DEY'
EA      NOP
88      DEY
30 FB    BMI *-3</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>A6 A6    LDX $A6
A2 08    LDX #8
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
!colspan="2"|9 bytes
|-
|<pre>C5 C5    CMP $C5
48      PHA
A9 0A    LDA #$0A ;hides 'ASL A'
18      CLC
10 FC    BPL *-2
68      PLA</pre>||Clobbers Z&N, and C
|-
|-
|<pre>NOP
|<pre>08      PHP
PHP
A5 A5    LDA $A5
PLP
A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts14</pre>
18      CLC
|Requires @rts14
10 FC    BPL *-2
28      PLP</pre>||Clobbers A
|-
|-
|<pre>NOP
|<pre>08      PHP
PHA
A2 04    LDX #4
PHA
EA  ... NOP     × 2
JSR @rts15</pre>
CA      DEX
|Clobbers S and requires @rts15
D0 FB    BNE *-3
28      PLP</pre>||Clobbers X
|-
|-
|<pre>PHA
|<pre>08      PHP
PLA
A0 04    LDY #4
PLA
EA  ... NOP      × 2
PLA
88      DEY
PLA
D0 FB    BNE *-3
PLA</pre>
28      PLP</pre>||Clobbers Y
|Clobbers Z, N, A and S
|-
|-
|<pre>LDY #130
!colspan="2"|10 bytes
@Y = * - 1
; ^ Hides !NOP #imm
NOP $EA,X ;hides 'NOP'
NOP
DEY
BMI @Y</pre>
|Clobbers Z, N and Y and requires support for unofficial opcodes
|-
|-
|<pre>LDX #130
|<pre>EA      NOP
@X = * - 1
48      PHA
; ^ Hides !NOP #imm
98      TYA
NOP $EA,X ;hides 'NOP'
A0 06    LDY #6
NOP
88      DEY
DEX
D0 FD    BNE *-1
BMI @X</pre>
A8      TAY
|Clobbers Z, N and X and requires support for unofficial opcodes
68      PLA</pre>||Clobbers Z&N
|-
|-
!colspan="2"|11 bytes
|-
|<pre>08      PHP
48      PHA
98      TYA
A0 05    LDY #5
88      DEY
D0 FD    BNE *-1
A8      TAY
68      PLA
28      PLP</pre>||No requirements
|-
|}
=== 45 cycles ===
{| class="wikitable testtable"
!colspan="2"|7 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>NOP
|<pre>98      TYA
PHP
A0 08    LDY #8
PLP
88      DEY
PHP
D0 FD    BNE *-1
PLP
A8      TAY</pre>||Clobbers A, and Z&N
PHP
|-
PLP</pre>
|<pre>EA  ... NOP     × 2
|Clobbers nothing, requires nothing
A2 08    LDX #8
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA  ... NOP      × 2
A0 08    LDY #8
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>48      PHA
38      SEC
A9 69    LDA #$69 ;hides 'ADC #$EA'
EA      NOP ;first loop only
B0 FC    BCS *-2
68      PLA</pre>||Clobbers Z&N, C, and V
|-
|<pre>08      PHP
38      SEC
A9 69    LDA #$69 ;hides 'ADC #$EA'
EA      NOP ;first loop only
B0 FC    BCS *-2
28      PLP</pre>||Clobbers A
|-
|<pre>EA      NOP
08      PHP
A2 07    LDX #7
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA      NOP
08      PHP
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
48      PHA
18      CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}




=== 24 cycles ===
=== 46 cycles ===
{| class="wikitable"
{| class="wikitable testtable"
!colspan="2"|5 bytes
!colspan="2"|5 bytes
|-
|-
|<pre>LDY #130
|<pre>A2 08    LDX #8
@Y = * - 1
CA      DEX
; ^ Hides !NOP #imm
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
NOP $2808 ;hides 'PHP' and 'PLP'; reads from $2000
|-
DEY
|<pre>A0 09    LDY #9
BMI @Y</pre>
88      DEY
|Clobbers Z, N and Y and requires support for unofficial opcodes
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|6 bytes
|-
|<pre>48      PHA
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28      PLP</pre>||Clobbers A
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
A6 A6    LDX $A6
A2 07    LDX #7
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A4 A4    LDY $A4
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|10 bytes
|-
|<pre>48      PHA
98      TYA
A0 88    LDY #136 ;hides 'DEY'
88  ... DEY      × 2
30 FB    BMI *-3
A8      TAY
68      PLA</pre>||Clobbers Z&N
|-
!colspan="2"|11 bytes
|-
|<pre>08      PHP
48      PHA
A9 2A    LDA #$2A ;hides 'ROL A'
EA  ... NOP      × 3
10 FA    BPL *-4
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 47 cycles ===
{| class="wikitable testtable"
!colspan="2"|8 bytes
|-
|<pre>98      TYA
A0 06    LDY #6
EA      NOP
88      DEY
D0 FC    BNE *-2
A8      TAY</pre>||Clobbers A, and Z&N
|-
|<pre>EA  ... NOP      × 3
A2 08    LDX #8
CA      DEX
D0 FD    BNE *-1</pre>||Clobbers X, and Z&N
|-
|<pre>08      PHP
A2 05    LDX #5 ;hides 'ORA zp'
EA      NOP
CA      DEX
D0 FB    BNE *-3
28      PLP</pre>||Clobbers A, and X
|-
|<pre>EA  ... NOP      × 3
A0 08    LDY #8
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
|<pre>08      PHP
A0 05    LDY #5 ;hides 'ORA zp'
EA      NOP
88      DEY
D0 FB    BNE *-3
28      PLP</pre>||Clobbers A, and Y
|-
!colspan="2"|9 bytes
|-
|<pre>48      PHA
98      TYA
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
A8      TAY
68      PLA</pre>||Clobbers Z&N
|-
|<pre>08      PHP
98      TYA
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
A8      TAY
28      PLP</pre>||Clobbers A
|-
|<pre>EA  ... NOP      × 2
08      PHP
A2 07    LDX #7
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>EA  ... NOP      × 2
08      PHP
A0 06    LDY #6
88      DEY
10 FD    BPL *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|10 bytes
|-
|-
|<pre>LDX #130
|<pre>08      PHP
@X = * - 1
48      PHA
; ^ Hides !NOP #imm
18  ... CLC      × 2
NOP $2808 ;hides 'PHP' and 'PLP'; reads from $2000
A9 0A    LDA #$0A ;hides 'ASL A'
DEX
90 FD    BCC *-1
BMI @X</pre>
68      PLA
|Clobbers Z, N and X and requires support for unofficial opcodes
28      PLP</pre>||No requirements
|-
|-
|}
=== 48 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
!colspan="2"|6 bytes
|-
|-
|<pre>JSR @rts12
|<pre>EA      NOP
JSR @rts12</pre>
A2 08    LDX #8
|Requires @rts12
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
|<pre>EA      NOP
A0 09    LDY #9
88      DEY
D0 FD    BNE *-1</pre>||Clobbers Y, and Z&N
|-
!colspan="2"|7 bytes
|-
|<pre>48      PHA
38      SEC
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
38      SEC
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 08    LDX #8
CA      DEX
D0 FD    BNE *-1
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 08    LDY #8
88      DEY
D0 FD    BNE *-1
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|-
|<pre>NOP
|<pre>08      PHP
PHP
48      PHA
PLP
A9 0A    LDA #$0A ;hides 'ASL A'
JSR @rts15</pre>
18      CLC
|Requires @rts15
10 FC    BPL *-2
68      PLA
28      PLP</pre>||No requirements
|-
|-
|<pre>PLA
|}
PLA
 
PLA
 
PLA
=== 49 cycles ===
PLA
{| class="wikitable testtable"
PLA</pre>
!colspan="2"|4 bytes
|Clobbers Z, N, A and S
|-
|-
|<pre>PHA
|<pre>A0 88    LDY #136 ;hides 'DEY'
PHP
30 FD    BMI *-1</pre>||Clobbers Y, and Z&N
PLP
JSR @rts14</pre>
|Clobbers S and requires @rts14
|-
|-
!colspan="2"|7 bytes
!colspan="2"|7 bytes
|-
|-
|<pre>TSX
|<pre>18      CLC
PLA
A9 2A    LDA #$2A ;hides 'ROL A'
PLA
08      PHP
PLA
28      PLP
PLA
90 FB    BCC *-3</pre>||Clobbers A, Z&N, and C
PLA
|-
TXS</pre>
|<pre>A6 A6    LDX $A6
|Clobbers Z, N, A and X
A2 08    LDX #8
CA      DEX
10 FD    BPL *-1</pre>||Clobbers X, and Z&N
|-
!colspan="2"|8 bytes
|-
|<pre>C5 C5    CMP $C5
48      PHA
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68      PLA</pre>||Clobbers Z&N, and C
|-
|<pre>08      PHP
A5 A5    LDA $A5
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28      PLP</pre>||Clobbers A
|-
!colspan="2"|10 bytes
|-
|<pre>08      PHP
48      PHA
A9 2A    LDA #$2A ;hides 'ROL A'
08      PHP
28      PLP
10 FB    BPL *-3
68      PLA
28      PLP</pre>||No requirements
|-
|}
 
 
=== 50 cycles ===
{| class="wikitable testtable"
!colspan="2"|6 bytes
|-
|<pre>A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A      ROL A ;first loop only
EA      NOP
B0 FB    BCS *-3</pre>||Clobbers A, Z&N, C, and V
|-
|<pre>A2 07    LDX #7
EA      NOP
CA      DEX
D0 FC    BNE *-2</pre>||Clobbers X, and Z&N
|-
|-
|<pre>PHP
|<pre>A0 06    LDY #6
BIT $00
EA      NOP
PLP
88      DEY
JSR @rts14</pre>
10 FC    BPL *-2</pre>||Clobbers Y, and Z&N
|Requires @rts14
|-
|-
|<pre>PHA
!colspan="2"|7 bytes
PHP
PLP
PHP
PLP
PHP
PLP</pre>
|Clobbers S
|-
|-
|<pre>SEC
|<pre>98      TYA
LDA #130
A0 09    LDY #9
@A = * - 1
88      DEY
; ^ Hides !NOP #imm
D0 FD    BNE *-1
.byte $0C,$E6,@zp_temp ;NOP abs; hides 'INC @zp_temp'
A8      TAY</pre>||Clobbers A, and Z&N
SBC #1
BMI @A</pre>
|Clobbers C, Z, N and A and requires support for unofficial opcodes and @zptemp
|-
|-
!colspan="2"|8 bytes
!colspan="2"|8 bytes
|-
|-
|<pre>PHP
|<pre>48      PHA
PLP
38  ... SEC      × 2
PHP
A9 4A    LDA #$4A ;hides 'LSR A'
PLP
D0 FD    BNE *-1
PHP
68      PLA</pre>||Clobbers Z&N, and C
BIT $00
|-
PLP</pre>
|<pre>08      PHP
|Clobbers nothing, requires nothing
38  ... SEC      × 2
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28      PLP</pre>||Clobbers A
|-
|<pre>08      PHP
A2 05    LDX #5
EA      NOP
CA      DEX
10 FC    BPL *-2
28      PLP</pre>||Clobbers X
|-
|<pre>08      PHP
A0 06    LDY #6
EA      NOP
88      DEY
D0 FC    BNE *-2
28      PLP</pre>||Clobbers Y
|-
!colspan="2"|9 bytes
|-
|<pre>08      PHP
48      PHA
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A      ROL A ;first loop only
B0 FC    BCS *-2
68      PLA
28      PLP</pre>||No requirements
|-
|-
|}
|}


== More ==
 
Bisqwit's 6502 delay_n macro set for ca65: http://bisqwit.iki.fi/src/6502-inline_delay.7z
== Sanity checks ==
 
It is possible to verify on compile time that no page wrap occurs,
by replacing all branches with these macros:
<pre>.macro branch_check opc, dest
    opc dest
    .assert >* = >(dest), warning, "branch_check: failed, crosses page"
.endmacro
.macro bccnw dest
        branch_check bcc, dest
.endmacro
.macro bcsnw dest
        branch_check bcs, dest
.endmacro
.macro beqnw dest
        branch_check beq, dest
.endmacro
.macro bnenw dest
        branch_check bne, dest
.endmacro
.macro bminw dest
        branch_check bmi, dest
.endmacro
.macro bplnw dest
        branch_check bpl, dest
.endmacro
.macro bvcnw dest
        branch_check bvc, dest
.endmacro
.macro bvsnw dest
        branch_check bvs, dest
.endmacro</pre>
 
== See also ==
 
* [[Cycle counting]]
* [[Delay code]] for functions that produce runtime-determined amount of delay
* Bisqwit’s “vending machine” for producing a ca65-compatible delay_n macro for arbitrary number of cycles, with more fine-grained configurable constraints: http://bisqwit.iki.fi/utils/nesdelay.php The samples on this page are excerpts from files generated by this online tool.

Latest revision as of 18:24, 12 November 2020

Shortest possible CPU code that creates N cycles of delay, depending on constraints.

Code

All code samples are written for CA65.

Assumptions:

  • No page wrap occurs during any branch instruction. If a page wrap occurs, it adds +1 cycle for each loop, completely thwarting the accurate delay.
  • No interrupt / NMI occurs during the delay code.

It is permissible for DMA to steal cycles during the loops. If you are expecting that to happen, you have to manually adjust the delay cycle count (and it is in fact possible to do so) in order to get the correct delay.

Explanations on the requirements

  • @rts12 means you know a memory address that contains byte $60 (RTS).

cycle instruction that fits your constraints (such as LDA $00), followed by RTS.

Instructions, addressing modes, byte counts, cycle counts and notes

Addressing mode Instruction type Bytes Cycle count Example instruction Notes
Implied Inter-register 1 2 TAX NOP has no side effects. Flag-manipulations like CLC, and SECCLV are used when their effects are desired.
Implied Stack push 1 3 PHA PHP is only paired with PLP.
Implied Stack pop 1 4 PLA
Implied Return 1 6 RTS Used indirectly when paired with JSR. Similarly for RTI.
Immediate 2 2 CMP #$C5 Includes instructions like LDA, LDX and LDY. Other ALU instructions are used in more complex situations.
Relative Branch 2 2—4 BCC *+2 Branch takes 3 cycles when taken, 2 otherwise. A page crossing adds +1 cycle when branch is taken, but because of difficulties setting that up, we don't use it.
Zeropage Read, write 2 3 LDA $A5
Zeropage RMW 2 5 INC @zptemp Writing to zeropage is only permitted when @zptemp is available. Technically we could save @zptemp into register and restore at end, but it is bytewise inferior to other techniques.
Zeropage indexed Read, write 2 4 LDA $EA,X Inferior to 2 × NOP, but useful for hiding additional code to be executed in a loop.
Zeropage indexed RMW 2 6 INC @zptemp,X Only doable when X is known to be 0, or when entire zeropage can be clobbered.
Indexed indirect Read, write 2 6 STA (@ptrtemp,X) Only doable when X is known to be 0.
Indexed indirect RMW 2 8 SLO (@ptrtemp,X) The most cost-effective instruction. Only doable when X is known to be 0, lest we write to a random address. All instructions in this category are unofficial.
Indirect indexed Read 2 5—6 LDA (@ptrtemp),Y Never used by this code.
Indirect indexed Write 2 6 STA (@ptrtemp),Y Only doable when Y is known to be 0.
Indirect indexed RMW 2 8 SLO (@ptrtemp),Y All instructions in this category are unofficial.
Absolute Jump 3 3 JMP *+3
Absolute Read, write 3 4 LDA $2808 Inferior to 2 × NOP, but can be used carefully to hide additional code to be executed in a loop.
Absolute RMW 3 6 INC $4018 Inferior to 3 × NOP.
Absolute indexed Read 3 4—5 LDA $0200,X Inferior to shorter alternatives.
Absolute indexed Write 3 5 STA $0200,X Inferior to shorter alternatives.
Absolute indexed RMW 3 7 INC $4018,X Only doable when writing into the given address is harmless considering the possible values of X.
Absolute indirect Jump 3 5 JMP (@ptrtemp) Inferior to shorter alternatives.

{{#css: 

 .testtable td{padding:2px} .testtable td pre{padding:2px;margin:2px}

}}


2 cycles

1 bytes 
EA       NOP
 No requirements
  • All instructions cost at least 2 cycles. There is no way to do 1 cycle of delay (though −1 cycles may sometimes appear in branch cost calculations).


3 cycles

2 bytes 
C5 C5    CMP $C5
 Clobbers Z&N, and C 
24 24    BIT $24
 Clobbers Z&N, and V 
A5 A5    LDA $A5
 Clobbers A, and Z&N 
A6 A6    LDX $A6
 Clobbers X, and Z&N 
A4 A4    LDY $A4
 Clobbers Y, and Z&N
3 bytes 
4C xx xx JMP *+3
 No requirements
  • Not relocatable means that the target address is hardcoded into the code. In ROM hacking, it sometimes makes sense to move code blobs around, and a hardcoded address makes it difficult to relocate the code. This restriction does not apply to branches, which use relative addressing. It is also assumed to not apply to JSR instructions, as chances are the JSR target is outside the code being relocated.


4 cycles

2 bytes 
EA   ... NOP      × 2
 No requirements
  • zp-indexed modes such as LDA $00,X also do 4 cycles, but having side effects, these two-byte instructions are inferior to a simple 2 × NOP.
  • There is also an unofficial opcode NOP $00,X (34 00), but there is no reason to use this instruction when the official equivalent has the same performance.


5 cycles

3 bytes 
18       CLC
90 00    BCC *+2
 Clobbers C 
B8       CLV
50 00    BVC *+2
 Clobbers V 
EA       NOP
A5 A5    LDA $A5
 Clobbers A, and Z&N 
EA       NOP
A6 A6    LDX $A6
 Clobbers X, and Z&N 
EA       NOP
A4 A4    LDY $A4
 Clobbers Y, and Z&N
4 bytes 
EA       NOP
4C xx xx JMP *+3
 No requirements
  • abs-indexed modes such as LDA $1234,X cause 4 or 5 cycles of delay, depending whether a page wrap occurred. Because you need extra setup code to make sure that a wrap does occur, you do not see this mode in these samples, outside situations where circumstances permit.


6 cycles

3 bytes 
EA   ... NOP      × 3
 No requirements
  • zp-indexed RMW instructions such as INC @zptemp,X do 6 cycles. Unless we know the value of X, it might write into any address between $00-$FF. This option is only useful if the entire range of $00-$FF is free for clobbering with random data, or if X has a known value.
  • ix instructions like LDA ($00,X) do 6 cycles, but the value of X decides where a pointer is read from, and said pointer can point anywhere. We only do that when the value of X is known.
  • iy instructions like LDA ($00),Y also do 5-6 cycles, but in addition to the note above, we cannot predict whether a wrap occurs or not. So we don't use this mode.
  • Absolute RMW instructions like INC $4018 do 6 cycles, but weighing 3 bytes with side-effects it would be inferior to 3 × NOP.


7 cycles

2 bytes 
08       PHP
28       PLP
 No requirements
  • PHP-PLP is very efficient for 7 cycles of delay, but it does modify stack contents. S register remains unchanged though.
  • PLA-PHA does not overwrite any bytes in stack. It just writes back the same byte. But it does clobber A and Z+N. It is not interrupt-unsafe either: If an interrupt happens, the stack byte does get temporarily clobbered, but the value is still in A when the interrupt exits, and gets written back in stack.
  • abs-indexed RMW instructions such as INC abs,X do 7 cycles. We only do this when either we know the value of X (for instance, INC $4018,X is safe when X is 0—7, or when the entire 256-byte page can be safely overwritten with random data.


8 cycles

4 bytes 
EA   ... NOP      × 4
 No requirements
  • Unofficial ix and iy RMW instructions such as SLO ($00,X) or SLO ($00),Y would do 8 cycles for 2 bytes of code. We only do that if we know X or Y to be zero, and we have a known pointer to safely rewritable data.


9 cycles

3 bytes 
EA       NOP
08       PHP
28       PLP
 No requirements
  • Jumping into the middle of another instruction and thereby reusing code is a very efficient way of reducing code size. Note that all code samples using branches on this page require that no page wrap occurs.


10 cycles

4 bytes 
08       PHP
C5 C5    CMP $C5
28       PLP
 No requirements
  • The ROL-ROR sequence preserves the original value of the memory address. Carry is also preserved.


11 cycles

4 bytes 
EA   ... NOP      × 2
08       PHP
28       PLP
 No requirements


12 cycles

3 bytes 
20 xx xx JSR @rts12
 Requires @rts12
4 bytes 
36 36    ROL $36,X
76 36    ROR $36,X
 Clobbers Z&N
5 bytes 
08       PHP
18       CLC
90 00    BCC *+2
28       PLP
 No requirements
  • JSR-RTS causes 12 cycles of delay. But it does write a function return address in the stack, which may be unwanted in some applications. S is not modified.
  • Again, ROL-ROR does not have side effects (as long as an interrupt does not happen in the middle), except for Z+N.


13 cycles

5 bytes 
EA   ... NOP      × 3
08       PHP
28       PLP
 No requirements


14 cycles

4 bytes 
08       PHP       \ × 2
28       PLP       /
 No requirements


15 cycles

5 bytes 
08       PHP
BA       TSX
28       PLP
9A       TXS
28       PLP
 Clobbers X 
C5 C5    CMP $C5
20 xx xx JSR @rts12
 Clobbers Z&N, and C; and requires @rts12 
24 24    BIT $24
20 xx xx JSR @rts12
 Clobbers Z&N, and V; and requires @rts12 
A5 A5    LDA $A5
20 xx xx JSR @rts12
 Clobbers A, and Z&N; and requires @rts12 
A4 A4    LDY $A4
20 xx xx JSR @rts12
 Clobbers Y, and Z&N; and requires @rts12
6 bytes 
08       PHP
28       PLP
EA   ... NOP      × 4
 No requirements


16 cycles

5 bytes 
EA       NOP
08       PHP       \ × 2
28       PLP       /
 No requirements


17 cycles

6 bytes 
08       PHP
48       PHA
A5 A5    LDA $A5
68       PLA
28       PLP
 No requirements


18 cycles

6 bytes 
EA   ... NOP      × 2
08       PHP       \ × 2
28       PLP       /
 No requirements


19 cycles

5 bytes 
08       PHP
28       PLP
20 xx xx JSR @rts12
 Requires @rts12
6 bytes 
08       PHP
36 36    ROL $36,X
76 36    ROR $36,X
28       PLP
 No requirements


20 cycles

5 bytes 
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
 Clobbers A, Z&N, and C
7 bytes 
EA   ... NOP      × 3
08       PHP       \ × 2
28       PLP       /
 No requirements


21 cycles

5 bytes 
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
 Clobbers A, Z&N, and C 
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
6 bytes 
08       PHP       \ × 3
28       PLP       /
 No requirements


22 cycles

6 bytes 
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
 Clobbers A, Z&N, and C 
A2 02    LDX #2
EA       NOP
CA       DEX
10 FC    BPL *-2
 Clobbers X, and Z&N 
A0 03    LDY #3
EA       NOP
88       DEY
D0 FC    BNE *-2
 Clobbers Y, and Z&N
7 bytes 
08       PHP
BA       TSX
08       PHP
28   ... PLP      × 2
9A       TXS
28       PLP
 Clobbers X 
08       PHP
C5 C5    CMP $C5
28       PLP
20 xx xx JSR @rts12
 Requires @rts12
8 bytes 
08       PHP       \ × 2
28       PLP       /
EA   ... NOP      × 4
 No requirements


23 cycles

6 bytes 
18   ... CLC      × 2
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
 Clobbers A, Z&N, and C 
EA       NOP
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA       NOP
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
EA       NOP
08       PHP       \ × 3
28       PLP       /
 No requirements


24 cycles

4 bytes 
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
 Clobbers A, Z&N, and C
6 bytes 
20 xx xx JSR @rts12× 2
 Requires @rts12
7 bytes 
A6 A6    LDX $A6
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
A4 A4    LDY $A4
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
8 bytes 
08       PHP
C5 C5    CMP $C5
28       PLP       \ × 2
08       PHP       /
28       PLP
 No requirements


25 cycles

7 bytes 
98       TYA
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 2
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA   ... NOP      × 2
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
8 bytes 
EA   ... NOP      × 2
08       PHP       \ × 3
28       PLP       /
 No requirements


26 cycles

5 bytes 
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
 Clobbers A, Z&N, and C 
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
EA       NOP
20 xx xx JSR @rts12× 2
 Requires @rts12
8 bytes 
08       PHP
48       PHA
36 36    ROL $36,X
76 36    ROR $36,X
68       PLA
28       PLP
 No requirements


27 cycles

6 bytes 
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
 Clobbers A, Z&N, and C
7 bytes 
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
28       PLP
 Clobbers A 
24 2C    BIT <$2C ;hides 'BIT $FDA2'
A2 FD    LDX #253
E8       INX
D0 FA    BNE *-4
 Clobbers X, Z&N, and V 
24 2C    BIT <$2C ;hides 'BIT $FDA0'
A0 FD    LDY #253
C8       INY
D0 FA    BNE *-4
 Clobbers Y, Z&N, and V 
A4 AC    LDY <$AC ;hides 'LDY $82A2'
A2 82    LDX #130
CA       DEX
30 FA    BMI *-4
 Clobbers X, Y, and Z&N
8 bytes 
EA   ... NOP      × 3
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA   ... NOP      × 3
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N 
24 24    BIT $24
20 xx xx JSR @rts12× 2
 Clobbers Z&N, and V; and requires @rts12 
20 xx xx JSR @rts12
08       PHP
BA       TSX
28       PLP
9A       TXS
28       PLP
 Clobbers X; and requires @rts12
9 bytes 
EA   ... NOP      × 3
08       PHP       \ × 3
28       PLP       /
 No requirements


28 cycles

6 bytes 
38   ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
 Clobbers A, Z&N, and C 
EA       NOP
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
EA       NOP
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
28       PLP
 Clobbers A 
08       PHP
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
08       PHP
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
8 bytes 
08       PHP       \ × 4
28       PLP       /
 No requirements


29 cycles

6 bytes 
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA       NOP
90 FC    BCC *-2
 Clobbers A, Z&N, and C 
A2 04    LDX #4
EA       NOP
CA       DEX
D0 FC    BNE *-2
 Clobbers X, and Z&N 
A0 04    LDY #4
EA       NOP
88       DEY
D0 FC    BNE *-2
 Clobbers Y, and Z&N
8 bytes 
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
68       PLA
 Clobbers Z&N, and C 
08       PHP
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
28       PLP
 Clobbers A 
08       PHP
A2 02    LDX #2
EA       NOP
CA       DEX
10 FC    BPL *-2
28       PLP
 Clobbers X 
08       PHP
A0 03    LDY #3
EA       NOP
88       DEY
D0 FC    BNE *-2
28       PLP
 Clobbers Y
9 bytes 
08       PHP
28       PLP
08       PHP
C5 C5    CMP $C5
28       PLP
20 xx xx JSR @rts12
 Requires @rts12
10 bytes 
08       PHP
C5 C5    CMP $C5
28       PLP
08       PHP
36 36    ROL $36,X
76 36    ROR $36,X
28       PLP
 No requirements


30 cycles

7 bytes 
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 2
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
EA   ... NOP      × 2
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
8 bytes 
48       PHA
18   ... CLC      × 2
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
18   ... CLC      × 2
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
28       PLP
 Clobbers A 
EA       NOP
08       PHP
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
EA       NOP
08       PHP
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
18       CLC
A9 6A    LDA #$6A ;hides 'ROR A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


31 cycles

5 bytes 
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
 Clobbers A, Z&N, and C 
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
6 bytes 
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28       PLP
 Clobbers A
8 bytes 
08       PHP
28       PLP
20 xx xx JSR @rts12× 2
 Requires @rts12
9 bytes 
08       PHP
A6 A6    LDX $A6
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
08       PHP
A4 A4    LDY $A4
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
10 bytes 
08       PHP
36 36    ROL $36,X \ × 2
76 36    ROR $36,X /
28       PLP
 No requirements


32 cycles

6 bytes 
A2 05    LDX #5 ;hides 'ORA zp'
CA       DEX ;first loop only
CA       DEX
D0 FB    BNE *-3
 Clobbers A, X, and Z&N 
A0 05    LDY #5 ;hides 'ORA zp'
88       DEY ;first loop only
88       DEY
D0 FB    BNE *-3
 Clobbers A, Y, and Z&N
7 bytes 
A9 2A    LDA #$2A ;hides 'ROL A'
EA   ... NOP      × 3
10 FA    BPL *-4
 Clobbers A, Z&N, and C
8 bytes 
EA       NOP
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N 
A6 A6    LDX $A6
A2 04    LDX #4
EA       NOP
CA       DEX
D0 FC    BNE *-2
 Clobbers X, and Z&N 
A4 A4    LDY $A4
A0 04    LDY #4
EA       NOP
88       DEY
D0 FC    BNE *-2
 Clobbers Y, and Z&N
9 bytes 
48       PHA
98       TYA
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
 Clobbers Z&N 
08       PHP
98       TYA
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
A8       TAY
28       PLP
 Clobbers A 
EA   ... NOP      × 2
08       PHP
A2 04    LDX #4
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
EA   ... NOP      × 2
08       PHP
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
10 bytes 
08       PHP
48       PHA
18   ... CLC      × 2
A9 6A    LDA #$6A ;hides 'ROR A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


33 cycles

6 bytes 
18   ... CLC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
 Clobbers A, Z&N, and C 
EA       NOP
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
EA       NOP
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
48       PHA
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28       PLP
 Clobbers A 
08       PHP
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X 
08       PHP
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
9 bytes 
EA       NOP
08       PHP
28       PLP
20 xx xx JSR @rts12× 2
 Requires @rts12
10 bytes 
08       PHP       \ × 2
28       PLP       /
08       PHP
36 36    ROL $36,X
76 36    ROR $36,X
28       PLP
 No requirements


34 cycles

5 bytes 
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
 Clobbers A, Z&N, and C 
A0 88    LDY #136 ;hides 'DEY'
88       DEY
30 FC    BMI *-2
 Clobbers Y, and Z&N
7 bytes 
A6 A6    LDX $A6
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N
8 bytes 
C5 C5    CMP $C5
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28       PLP
 Clobbers A
9 bytes 
08       PHP
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
68       PLA
28       PLP
 No requirements


35 cycles

6 bytes 
A9 2A    LDA #$2A ;hides 'ROL A'
08       PHP
28       PLP
10 FB    BPL *-3
 Clobbers A, Z&N, and C 
A2 F8    LDX #248 ;hides 'SED'
E8   ... INX      × 2
D0 FB    BNE *-3
 Clobbers X, Z&N, and D 
A0 88    LDY #136 ;hides 'DEY'
88   ... DEY      × 2
30 FB    BMI *-3
 Clobbers Y, and Z&N
7 bytes 
98       TYA
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 2
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N
8 bytes 
48       PHA
38   ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
38   ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
28       PLP
 Clobbers A 
EA       NOP
08       PHP
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X 
EA       NOP
08       PHP
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


36 cycles

5 bytes 
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A       ROL A ;first loop only
B0 FC    BCS *-2
 Clobbers A, Z&N, C, and V 
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
 Clobbers Y, and Z&N
6 bytes 
38       SEC
A9 0A    LDA #$0A ;hides 'ASL A'
38       SEC
10 FC    BPL *-2
 Clobbers A, Z&N, and C
8 bytes 
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA       NOP
90 FC    BCC *-2
68       PLA
 Clobbers Z&N, and C 
08       PHP
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA       NOP
90 FC    BCC *-2
28       PLP
 Clobbers A 
08       PHP
A2 04    LDX #4
EA       NOP
CA       DEX
D0 FC    BNE *-2
28       PLP
 Clobbers X 
08       PHP
A0 04    LDY #4
EA       NOP
88       DEY
D0 FC    BNE *-2
28       PLP
 Clobbers Y
9 bytes 
20 xx xx JSR @rts12× 3
 Requires @rts12
10 bytes 
08       PHP
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
38       SEC
10 FC    BPL *-2
68       PLA
28       PLP
 No requirements


37 cycles

7 bytes 
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
 Clobbers A, Z&N, and C 
A2 04    LDX #4
EA   ... NOP      × 2
CA       DEX
D0 FB    BNE *-3
 Clobbers X, and Z&N 
A0 04    LDY #4
EA   ... NOP      × 2
88       DEY
D0 FB    BNE *-3
 Clobbers Y, and Z&N
8 bytes 
EA       NOP
98       TYA
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N
9 bytes 
48       PHA
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
 Clobbers Z&N 
08       PHP
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
28       PLP
 Clobbers A 
EA   ... NOP      × 2
08       PHP
A2 04    LDX #4
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X 
EA   ... NOP      × 2
08       PHP
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
10 bytes 
08       PHP
48       PHA
18   ... CLC      × 2
A9 2A    LDA #$2A ;hides 'ROL A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


38 cycles

6 bytes 
38       SEC
A9 69    LDA #$69 ;hides 'ADC #$EA'
EA       NOP ;first loop only
B0 FC    BCS *-2
 Clobbers A, Z&N, C, and V 
EA       NOP
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA       NOP
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
 Clobbers Y, and Z&N
7 bytes 
48       PHA
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
28       PLP
 Clobbers A 
08       PHP
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X 
08       PHP
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
8 bytes 
08       PHP
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
28       PLP
 No requirements


39 cycles

4 bytes 
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
 Clobbers A, Z&N, and C
7 bytes 
A6 A6    LDX $A6
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
A4 A4    LDY $A4
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
 Clobbers Y, and Z&N
8 bytes 
98       TYA
A0 88    LDY #136 ;hides 'DEY'
88   ... DEY      × 2
30 FB    BMI *-3
A8       TAY
 Clobbers A, and Z&N 
08       PHP
A2 05    LDX #5 ;hides 'ORA zp'
CA       DEX ;first loop only
CA       DEX
D0 FB    BNE *-3
28       PLP
 Clobbers A, and X 
08       PHP
A0 05    LDY #5 ;hides 'ORA zp'
88       DEY ;first loop only
88       DEY
D0 FB    BNE *-3
28       PLP
 Clobbers A, and Y
9 bytes 
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
EA   ... NOP      × 3
10 FA    BPL *-4
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 2A    LDA #$2A ;hides 'ROL A'
EA   ... NOP      × 3
10 FA    BPL *-4
28       PLP
 Clobbers A
10 bytes 
EA       NOP
48       PHA
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
 Clobbers Z&N 
08       PHP
A6 A6    LDX $A6
A2 04    LDX #4
EA       NOP
CA       DEX
D0 FC    BNE *-2
28       PLP
 Clobbers X 
08       PHP
A4 A4    LDY $A4
A0 04    LDY #4
EA       NOP
88       DEY
D0 FC    BNE *-2
28       PLP
 Clobbers Y
11 bytes 
08       PHP
48       PHA
98       TYA
A0 04    LDY #4
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
28       PLP
 No requirements


40 cycles

6 bytes 
A2 05    LDX #5 ;hides 'ORA zp'
EA       NOP
CA       DEX
D0 FB    BNE *-3
 Clobbers A, X, and Z&N 
A0 05    LDY #5 ;hides 'ORA zp'
EA       NOP
88       DEY
D0 FB    BNE *-3
 Clobbers A, Y, and Z&N
7 bytes 
98       TYA
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 2
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA   ... NOP      × 2
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
 Clobbers Y, and Z&N
8 bytes 
48       PHA
18   ... CLC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
18   ... CLC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
28       PLP
 Clobbers A 
EA       NOP
08       PHP
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X 
EA       NOP
08       PHP
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
28       PLP
 No requirements


41 cycles

5 bytes 
38       SEC
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
 Clobbers A, Z&N, and C 
A2 08    LDX #8
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
A0 08    LDY #8
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
28       PLP
 Clobbers A 
08       PHP
A0 88    LDY #136 ;hides 'DEY'
88       DEY
30 FC    BMI *-2
28       PLP
 Clobbers Y
9 bytes 
08       PHP
A6 A6    LDX $A6
A2 05    LDX #5
CA       DEX
10 FD    BPL *-1
28       PLP
 Clobbers X
10 bytes 
08       PHP
48       PHA
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
28       PLP
 No requirements


42 cycles

6 bytes 
A5 A5    LDA $A5
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
 Clobbers A, Z&N, and C
7 bytes 
EA       NOP
A2 05    LDX #5 ;hides 'ORA zp'
EA       NOP
CA       DEX
D0 FB    BNE *-3
 Clobbers A, X, and Z&N 
EA       NOP
A0 05    LDY #5 ;hides 'ORA zp'
EA       NOP
88       DEY
D0 FB    BNE *-3
 Clobbers A, Y, and Z&N
8 bytes 
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
08       PHP
28       PLP
10 FB    BPL *-3
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 2A    LDA #$2A ;hides 'ROL A'
08       PHP
28       PLP
10 FB    BPL *-3
28       PLP
 Clobbers A 
08       PHP
A2 F8    LDX #248 ;hides 'SED'
E8   ... INX      × 2
D0 FB    BNE *-3
28       PLP
 Clobbers X 
08       PHP
A0 88    LDY #136 ;hides 'DEY'
88   ... DEY      × 2
30 FB    BMI *-3
28       PLP
 Clobbers Y
9 bytes 
48       PHA
98       TYA
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
 Clobbers Z&N
10 bytes 
08       PHP
48       PHA
38   ... SEC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
10 FD    BPL *-1
68       PLA
28       PLP
 No requirements


43 cycles

6 bytes 
38   ... SEC      × 2
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
 Clobbers A, Z&N, and C 
A2 05    LDX #5
EA       NOP
CA       DEX
10 FC    BPL *-2
 Clobbers X, and Z&N 
A0 06    LDY #6
EA       NOP
88       DEY
D0 FC    BNE *-2
 Clobbers Y, and Z&N
7 bytes 
48       PHA
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A       ROL A ;first loop only
B0 FC    BCS *-2
68       PLA
 Clobbers Z&N, C, and V 
08       PHP
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A       ROL A ;first loop only
B0 FC    BCS *-2
28       PLP
 Clobbers A 
08       PHP
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
08       PHP
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
28       PLP
 Clobbers Y
8 bytes 
48       PHA
38       SEC
A9 0A    LDA #$0A ;hides 'ASL A'
38       SEC
10 FC    BPL *-2
68       PLA
 Clobbers Z&N, and C
10 bytes 
08       PHP
48       PHA
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
EA       NOP
90 FC    BCC *-2
68       PLA
28       PLP
 No requirements


44 cycles

6 bytes 
A9 0A    LDA #$0A ;hides 'ASL A'
EA   ... NOP      × 2
10 FB    BPL *-3
 Clobbers A, Z&N, and C 
A0 88    LDY #136 ;hides 'DEY'
EA       NOP
88       DEY
30 FB    BMI *-3
 Clobbers Y, and Z&N
7 bytes 
A6 A6    LDX $A6
A2 08    LDX #8
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N
9 bytes 
C5 C5    CMP $C5
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
68       PLA
 Clobbers Z&N, and C 
08       PHP
A5 A5    LDA $A5
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
28       PLP
 Clobbers A 
08       PHP
A2 04    LDX #4
EA   ... NOP      × 2
CA       DEX
D0 FB    BNE *-3
28       PLP
 Clobbers X 
08       PHP
A0 04    LDY #4
EA   ... NOP      × 2
88       DEY
D0 FB    BNE *-3
28       PLP
 Clobbers Y
10 bytes 
EA       NOP
48       PHA
98       TYA
A0 06    LDY #6
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
 Clobbers Z&N
11 bytes 
08       PHP
48       PHA
98       TYA
A0 05    LDY #5
88       DEY
D0 FD    BNE *-1
A8       TAY
68       PLA
28       PLP
 No requirements


45 cycles

7 bytes 
98       TYA
A0 08    LDY #8
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 2
A2 08    LDX #8
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
EA   ... NOP      × 2
A0 08    LDY #8
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
8 bytes 
48       PHA
38       SEC
A9 69    LDA #$69 ;hides 'ADC #$EA'
EA       NOP ;first loop only
B0 FC    BCS *-2
68       PLA
 Clobbers Z&N, C, and V 
08       PHP
38       SEC
A9 69    LDA #$69 ;hides 'ADC #$EA'
EA       NOP ;first loop only
B0 FC    BCS *-2
28       PLP
 Clobbers A 
EA       NOP
08       PHP
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
EA       NOP
08       PHP
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
18       CLC
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


46 cycles

5 bytes 
A2 08    LDX #8
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
A0 09    LDY #9
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
6 bytes 
48       PHA
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28       PLP
 Clobbers A
9 bytes 
08       PHP
A6 A6    LDX $A6
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
08       PHP
A4 A4    LDY $A4
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
28       PLP
 Clobbers Y
10 bytes 
48       PHA
98       TYA
A0 88    LDY #136 ;hides 'DEY'
88   ... DEY      × 2
30 FB    BMI *-3
A8       TAY
68       PLA
 Clobbers Z&N
11 bytes 
08       PHP
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
EA   ... NOP      × 3
10 FA    BPL *-4
68       PLA
28       PLP
 No requirements


47 cycles

8 bytes 
98       TYA
A0 06    LDY #6
EA       NOP
88       DEY
D0 FC    BNE *-2
A8       TAY
 Clobbers A, and Z&N 
EA   ... NOP      × 3
A2 08    LDX #8
CA       DEX
D0 FD    BNE *-1
 Clobbers X, and Z&N 
08       PHP
A2 05    LDX #5 ;hides 'ORA zp'
EA       NOP
CA       DEX
D0 FB    BNE *-3
28       PLP
 Clobbers A, and X 
EA   ... NOP      × 3
A0 08    LDY #8
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N 
08       PHP
A0 05    LDY #5 ;hides 'ORA zp'
EA       NOP
88       DEY
D0 FB    BNE *-3
28       PLP
 Clobbers A, and Y
9 bytes 
48       PHA
98       TYA
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
A8       TAY
68       PLA
 Clobbers Z&N 
08       PHP
98       TYA
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
A8       TAY
28       PLP
 Clobbers A 
EA   ... NOP      × 2
08       PHP
A2 07    LDX #7
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
EA   ... NOP      × 2
08       PHP
A0 06    LDY #6
88       DEY
10 FD    BPL *-1
28       PLP
 Clobbers Y
10 bytes 
08       PHP
48       PHA
18   ... CLC      × 2
A9 0A    LDA #$0A ;hides 'ASL A'
90 FD    BCC *-1
68       PLA
28       PLP
 No requirements


48 cycles

6 bytes 
EA       NOP
A2 08    LDX #8
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N 
EA       NOP
A0 09    LDY #9
88       DEY
D0 FD    BNE *-1
 Clobbers Y, and Z&N
7 bytes 
48       PHA
38       SEC
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
38       SEC
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28       PLP
 Clobbers A 
08       PHP
A2 08    LDX #8
CA       DEX
D0 FD    BNE *-1
28       PLP
 Clobbers X 
08       PHP
A0 08    LDY #8
88       DEY
D0 FD    BNE *-1
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
A9 0A    LDA #$0A ;hides 'ASL A'
18       CLC
10 FC    BPL *-2
68       PLA
28       PLP
 No requirements


49 cycles

4 bytes 
A0 88    LDY #136 ;hides 'DEY'
30 FD    BMI *-1
 Clobbers Y, and Z&N
7 bytes 
18       CLC
A9 2A    LDA #$2A ;hides 'ROL A'
08       PHP
28       PLP
90 FB    BCC *-3
 Clobbers A, Z&N, and C 
A6 A6    LDX $A6
A2 08    LDX #8
CA       DEX
10 FD    BPL *-1
 Clobbers X, and Z&N
8 bytes 
C5 C5    CMP $C5
48       PHA
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
A5 A5    LDA $A5
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28       PLP
 Clobbers A
10 bytes 
08       PHP
48       PHA
A9 2A    LDA #$2A ;hides 'ROL A'
08       PHP
28       PLP
10 FB    BPL *-3
68       PLA
28       PLP
 No requirements


50 cycles

6 bytes 
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A       ROL A ;first loop only
EA       NOP
B0 FB    BCS *-3
 Clobbers A, Z&N, C, and V 
A2 07    LDX #7
EA       NOP
CA       DEX
D0 FC    BNE *-2
 Clobbers X, and Z&N 
A0 06    LDY #6
EA       NOP
88       DEY
10 FC    BPL *-2
 Clobbers Y, and Z&N
7 bytes 
98       TYA
A0 09    LDY #9
88       DEY
D0 FD    BNE *-1
A8       TAY
 Clobbers A, and Z&N
8 bytes 
48       PHA
38   ... SEC      × 2
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
68       PLA
 Clobbers Z&N, and C 
08       PHP
38   ... SEC      × 2
A9 4A    LDA #$4A ;hides 'LSR A'
D0 FD    BNE *-1
28       PLP
 Clobbers A 
08       PHP
A2 05    LDX #5
EA       NOP
CA       DEX
10 FC    BPL *-2
28       PLP
 Clobbers X 
08       PHP
A0 06    LDY #6
EA       NOP
88       DEY
D0 FC    BNE *-2
28       PLP
 Clobbers Y
9 bytes 
08       PHP
48       PHA
A9 E9    LDA #$E9 ;hides 'SBC #$2A'
2A       ROL A ;first loop only
B0 FC    BCS *-2
68       PLA
28       PLP
 No requirements


Sanity checks

It is possible to verify on compile time that no page wrap occurs, by replacing all branches with these macros: 

.macro branch_check opc, dest
    opc dest
    .assert >* = >(dest), warning, "branch_check: failed, crosses page"
.endmacro
.macro bccnw dest
        branch_check bcc, dest
.endmacro
.macro bcsnw dest
        branch_check bcs, dest
.endmacro
.macro beqnw dest
        branch_check beq, dest
.endmacro
.macro bnenw dest
        branch_check bne, dest
.endmacro
.macro bminw dest
        branch_check bmi, dest
.endmacro
.macro bplnw dest
        branch_check bpl, dest
.endmacro
.macro bvcnw dest
        branch_check bvc, dest
.endmacro
.macro bvsnw dest
        branch_check bvs, dest
.endmacro

See also

  • Cycle counting
  • Delay code for functions that produce runtime-determined amount of delay
  • Bisqwit’s “vending machine” for producing a ca65-compatible delay_n macro for arbitrary number of cycles, with more fine-grained configurable constraints: http://bisqwit.iki.fi/utils/nesdelay.php The samples on this page are excerpts from files generated by this online tool.
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