INES Mapper 200: Difference between revisions
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[[Category:iNES Mappers]] | {{DEFAULTSORT:200}}[[Category:iNES Mappers]][[Category:Multicart mappers]] | ||
'''iNES Mapper 200''' denotes the circuit boards of simple address-latch-based NROM-128 multicarts, i.e. CPU $8000-$BFFF is always a mirror of CPU $C000-$FFFF. | |||
The mapper number is used for two variants that differ in the bit that selects nametable mirroring. | |||
PCB that use this mapper : | |||
* '''MG109''' for the ''[[1993 Super 50 in 1 Game]]'' multicart | |||
=Address Latch ($8000-$FFFF, write)= | |||
==Submapper 0== | |||
A~[1... .... .... bBBB] | |||
|+++- PRG A16..A14, CHR A15..A13 | |||
+---- PRG A17, CHR A16, Mirroring: | |||
0: Vertical | |||
1: Horizontal | |||
==Submapper 1== | |||
A~[1... .... .... .bBB] | |||
|++- PRG A15..A14, CHR A14..A13 | |||
+--- PRG A16, CHR A15, Mirroring: | |||
0: Vertical | |||
1: Horizontal | |||
=Notes= | |||
* Some menus select bank numbers beyond the PRG ROM size, expecting to read back a solder pad value to select one of several displayed game counts. | |||
* [[NES 2.0 Mapper 338]] flips the meaning of the mirroring bit. | |||
Latest revision as of 17:35, 26 March 2023
iNES Mapper 200 denotes the circuit boards of simple address-latch-based NROM-128 multicarts, i.e. CPU $8000-$BFFF is always a mirror of CPU $C000-$FFFF.
The mapper number is used for two variants that differ in the bit that selects nametable mirroring.
PCB that use this mapper :
- MG109 for the 1993 Super 50 in 1 Game multicart
Address Latch ($8000-$FFFF, write)
Submapper 0
A~[1... .... .... bBBB] |+++- PRG A16..A14, CHR A15..A13 +---- PRG A17, CHR A16, Mirroring: 0: Vertical 1: Horizontal
Submapper 1
A~[1... .... .... .bBB] |++- PRG A15..A14, CHR A14..A13 +--- PRG A16, CHR A15, Mirroring: 0: Vertical 1: Horizontal
Notes
- Some menus select bank numbers beyond the PRG ROM size, expecting to read back a solder pad value to select one of several displayed game counts.
- NES 2.0 Mapper 338 flips the meaning of the mirroring bit.