NES 2.0 Mapper 351: Difference between revisions

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[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]]NES 2.0 Mapper 351 is used for a ''9-in-1'' multicart originally released by J.Y. Company and later Techline. It's an MMC3 clone with outer bank registers.
{{DEFAULTSORT:351}}[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]][[Category:Multi-ASIC mappers]]NES 2.0 Mapper 351 is used for Techline XB-xxx multicarts.


==Set CHR-ROM Base ($5000, write)==
==Set CHR-ROM Base ($5000, write)==
  Mask: unknown
  Mask: $F003
   
   
  D~7654 3210
  D~7654 3210
   ---------
   ---------
   BBBB BB..
   BBBB BBMM
   ++++-++--- Select 8 KiB CHR-ROM base to be OR'ed with MMC3 bank number
  |||| ||++- ASIC compatibility mode for inner bank selection
 
  |||| ||    0/1: [[MMC3]]
  |||| ||    2: [[MMC1]]
  |||| ||    3: [[VRC4]]
   ++++-++--- Select 8 KiB CHR-ROM base
All bits are cleared on reset, so that MMC3 mode is active. VRC4 mode uses bits 2 and 3 ($004s and $008s) as VRC A0/A1 if address bit 11 ($800s) is clear, and as VRC A1/A0 if bit 11 is address set during a write.
==Set PRG-ROM Base ($5001, write)==
==Set PRG-ROM Base ($5001, write)==
  Mask: unknown
  Mask: $F003
   
   
  D~7654 3210
  D~7654 3210
   ---------
   ---------
   BBBB BB..
   BBBB BB..
   ++++-++--- Select 16 KiB PRG-ROM base to be OR'ed with MMC3 bank number
   ++++-++--- Select 16 KiB PRG-ROM base
All bits are cleared on reset.
==Set Banking Mode ($5002, write)==
Mask: $F003
D~7654 3210
  ---------
  .CCp PP.R
    ||| || +- 0: CHR-ROM mode
    ||| ||    1: CHR-RAM mode
    ||| ++--- Inner PRG-ROM bank size
    |||        00: 256 KiB (p=0), 32 KiB (p=1)
    |||        01: 128 KiB (p=0), 16 KiB (p=1)
    |||        1x: 8 KiB (p=1)
    ||+------ PRG-ROM banking mode
    |||        0: ASIC (selecte by $5000.0-1)
    |||        1: NROM
    +++------ Inner CHR-ROM bank size
              1xx: 8 KiB
              01x: 128 KiB
              001: 32 KiB
              000: 256 KiB
All bits are cleared on reset. Unusually, in CHR-RAM mode (R=1), CHR-ROM becomes the second half of an enlarged PRG address space that becomes addressable via register $5001. At least one multicart containing both TLROM and UNROM games makes use of this feature and puts the UNROM game's PRG data into CHR-ROM. This seems to be possible as the mapper ASIC, PRG and CHR-ROM are under a single glob.


==Set Banking Mode ($5002, write)==
==NROM Mirroring ($4025, write)==
  Mask: unknown
  Mask: $FFFF
   
   
  D~7654 3210
  D~7654 3210
   ---------
   ---------
   MMmm .?..
   .... M...
  ||||  +--- Unknown
        +---- 0: Vertical Mirroring
  ||++------ Select outer bank size for CHR-ROM (and PRG-ROM in MMC3 mode)
              1: Horizontal Mirroring
  ||          0: 256 KiB
  ||          1: 32 KiB
  ||          2: 128 KiB
  ||          3: unknown, not used
  ++-------- PRG banking mode
              0: MMC3
              1: same as 0
              2: NROM-256
              3: NROM-128


==Note==
In NROM mode ($5002.4=1), mirroring can be changed via this [[FDS]]-inspired register as well, apparently in an attempt to become compatible with FDS conversions.
The circuit board detects Reset via interruption of the M2 signal to return to the multicart menu. This makes it difficult to dump the cartridge using a Kazzo device.

Latest revision as of 14:27, 11 September 2022

NES 2.0 Mapper 351 is used for Techline XB-xxx multicarts.

Set CHR-ROM Base ($5000, write)

Mask: $F003

D~7654 3210
  ---------
  BBBB BBMM
  |||| ||++- ASIC compatibility mode for inner bank selection
  |||| ||     0/1: MMC3
  |||| ||     2: MMC1
  |||| ||     3: VRC4
  ++++-++--- Select 8 KiB CHR-ROM base

All bits are cleared on reset, so that MMC3 mode is active. VRC4 mode uses bits 2 and 3 ($004s and $008s) as VRC A0/A1 if address bit 11 ($800s) is clear, and as VRC A1/A0 if bit 11 is address set during a write.

Set PRG-ROM Base ($5001, write)

Mask: $F003

D~7654 3210
  ---------
  BBBB BB..
  ++++-++--- Select 16 KiB PRG-ROM base

All bits are cleared on reset.

Set Banking Mode ($5002, write)

Mask: $F003

D~7654 3210
  ---------
  .CCp PP.R
   ||| || +- 0: CHR-ROM mode
   ||| ||    1: CHR-RAM mode
   ||| ++--- Inner PRG-ROM bank size
   |||        00: 256 KiB (p=0), 32 KiB (p=1)
   |||        01: 128 KiB (p=0), 16 KiB (p=1)
   |||        1x: 8 KiB (p=1)
   ||+------ PRG-ROM banking mode
   |||        0: ASIC (selecte by $5000.0-1)
   |||        1: NROM
   +++------ Inner CHR-ROM bank size
              1xx: 8 KiB
              01x: 128 KiB
              001: 32 KiB
              000: 256 KiB

All bits are cleared on reset. Unusually, in CHR-RAM mode (R=1), CHR-ROM becomes the second half of an enlarged PRG address space that becomes addressable via register $5001. At least one multicart containing both TLROM and UNROM games makes use of this feature and puts the UNROM game's PRG data into CHR-ROM. This seems to be possible as the mapper ASIC, PRG and CHR-ROM are under a single glob.

NROM Mirroring ($4025, write)

Mask: $FFFF

D~7654 3210
  ---------
  .... M...
       +---- 0: Vertical Mirroring
             1: Horizontal Mirroring

In NROM mode ($5002.4=1), mirroring can be changed via this FDS-inspired register as well, apparently in an attempt to become compatible with FDS conversions.