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| [[Category:iNES Mappers|014]][[Category:MMC3-like mappers|014]] | | {{DEFAULTSORT:014}}[[Category:iNES Mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]][[Category:Multi-ASIC mappers]] |
| | '''iNES Mapper 014''' denotes the 哥德 (Gouder) '''SL-1632''' PCB, used on the 8-character version of ''Samurai Spirits'' by Rex Soft. Like [[INES Mapper 116]], it uses the '''Huang-1''' ASIC together with a PAL that provides a supervisor register for selecting CHR A18 and for switching between [[MMC3]] and [[VRC2]] modes (A0/A1, VRC2b), but moves the supervisor register address to $A131, overlapping the MMC3 and VRC2 registers there. Its UNIF board name is '''UNL-SL1632'''. |
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| [[iNES Mapper 014]] is an [[MMC3]] variant mapper used in the pirate port of Samurai Spirits by Rex Game Soft. It is very similar to an MMC3, but contains an alternative mode that when used controls banking and mirroring independently of the normal MMC3 mode.
| | According to Nestopia's mapper source code, mirroring can only be controlled in VRC2 mode, and the VRC2 PRG and mirroring registers do not respond to address mirrors. These behaviors contradict other emulators and have not been verified on original hardware. |
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| This mapper is not widely supported by emulators. The following notes are based on Nestopia's SOMERITEAM SL-1632 mapper implementation.
| | ==Supervisor Register ($A131, write)== |
| | | Mask: $FFFF? |
| == MMC3 Mode Control: $A131 == | |
| | |
| 7 bit 0
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| ---------
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| A.B. C.M.
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| +- MMC3 mode (1: on, 0: off)
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| * When M is set, writes to $8000-FFFF operate mostly as normal for [[MMC3]].
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| * When M is clear, alternative functions appear (see MMC3 Mode Clear below).
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| * When M is written, the CHR and PRG banks must be switched either to their MMC3 banks (MMC3 Mode Set), or the alternative banks (MMC3 Mode Clear).
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| In MMC3 mode, bits 7, 5, and 3 of this register also control high bits of the CHR banks, allowing 512k of CHR ROM.
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| * If A is set add $100 to CHR banks 0, 1, 2, 3.
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| * If B is set add $100 to CHR banks 4, 5.
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| * If C is set add $100 to CHR banks 6, 7.
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| == MMC3 Mode Set ==
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| Note that when the MMC3 Mode bit is set, this mapper operates mostly like the MMC3, except the $A000-BFFE even register does not control the nametable mirroing (it can only be controlled with the MMC3 mode clear). Additionally, a write to the specific address $A131 will alter the MMC3 Mode bit as above.
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| * $8000-9FFE even - as MMC3
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| * $8001-9FFF odd - as MMC3
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| * $A000-BFFE even - ignored
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| * $A001-BFFF odd - as MMC3
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| * $C000-DFFE even - as MMC3
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| * $C001-DFFF odd - as MMC3
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| * $E000-FFFE even - as MMC3
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| * $E001-FFFF odd - as MMC3
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| == MMC3 Mode Clear ==
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| When the MMC3 Mode bit is clear, PRG banking is controlled by a 2 alternative registers, and CHR banking is controlled by 8 alternative registers. These banking registers are independent of the banking registers used when MMC3 Mode is set.
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| * PRG bank 0 - 8k at $8000-9FFF
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| * PRG bank 1 - 8k at $A000-BFFF
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| * PRG fixed - 16k at $C000-FFFF (fixed to last bank)
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| * CHR bank 0 - 1k at $0000-03FF
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| * CHR bank 1 - 1k at $0400-07FF
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| * CHR bank 2 - 1k at $0800-0BFF
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| * CHR bank 3 - 1k at $0C00-0FFF
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| * CHR bank 4 - 1k at $1000-13FF
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| * CHR bank 5 - 1k at $1400-17FF
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| * CHR bank 6 - 1k at $1800-1BFF
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| * CHR bank 7 - 1k at $1C00-1FFF
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| === $8000-8FFC (0 of 4) ===
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| * Selects 8k PRG bank at $8000-9FFF
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| * Only responds if address % $3 is 0
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| === $9000-9FFC (0 of 4) ===
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| 7 bit 0
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| ---------
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| .... ...M
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| +- [[Mirroring]] (0: vertical; 1: horizontal)
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| * Selects nametable mirroring. Note that mirroring cannot be set when this mapper is in MMC3 mode.
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| * Only responds if address % $3 is 0
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| === $A000-AFFC (0 of 4) ===
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| *Selects 8k PRG bank at $A000-EFFF
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| * Only responds if address % $3 is 0
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| === $B000-E003 ===
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| The address bits select one of 8 CHR bank registers in an unusual way:
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| 15 bit 0
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| -------------------
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| .ABC D... .... ..EF
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| CHR bank register: = (%ABC - 3) | %D | %E | | D~7654 3210 |
| | | --------- |
| The write to $B000-E003 sets only 4 bits of the CHR bank, selected by the least significant bit of the address (F).
| | A.B. C.M. |
| | | | | | +-- Mapper mode |
| if (!F) | | | | | 0: VRC2 |
| register = (register & $F0) | (data & $0F) | | | | | 1: MMC3 |
| else
| | | | +---- CHR A18 for PPU $0000-$0FFF |
| register = (register & $0F) | ((data << 4) & $F0)
| | | +------- CHR A18 for PPU $1000-$17FF |
| | +--------- CHR A18 for PPU $1800-$1FFF |
iNES Mapper 014 denotes the 哥德 (Gouder) SL-1632 PCB, used on the 8-character version of Samurai Spirits by Rex Soft. Like INES Mapper 116, it uses the Huang-1 ASIC together with a PAL that provides a supervisor register for selecting CHR A18 and for switching between MMC3 and VRC2 modes (A0/A1, VRC2b), but moves the supervisor register address to $A131, overlapping the MMC3 and VRC2 registers there. Its UNIF board name is UNL-SL1632.
According to Nestopia's mapper source code, mirroring can only be controlled in VRC2 mode, and the VRC2 PRG and mirroring registers do not respond to address mirrors. These behaviors contradict other emulators and have not been verified on original hardware.
Supervisor Register ($A131, write)
Mask: $FFFF?
D~7654 3210
---------
A.B. C.M.
| | | +-- Mapper mode
| | | 0: VRC2
| | | 1: MMC3
| | +---- CHR A18 for PPU $0000-$0FFF
| +------- CHR A18 for PPU $1000-$17FF
+--------- CHR A18 for PPU $1800-$1FFF
