Delay code: Difference between revisions
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m (→A + 27 cycles of delay, clobbers A, Z&N, C, V: scratch that "no zero check" part) |
(new function) |
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; Time: A+25 clocks (including JSR) | ; Time: A+25 clocks (including JSR) | ||
;;;;;;;;;;;;;;;;;;;;;;;; | ;;;;;;;;;;;;;;;;;;;;;;;; | ||
: | ; Cycles Accumulator Carry flag | ||
; 0 1 2 3 4 5 6 (hex) 0 1 2 3 4 5 6 | |||
; | |||
; 6 6 6 6 6 6 6 00 01 02 03 04 05 06 | |||
: sbc #7 ; carry set by CMP | |||
delay_a_25_clocks: | delay_a_25_clocks: | ||
cmp #7 ; 2 2 2 2 2 2 2 00 01 02 03 04 05 06 0 0 0 0 0 0 0 | |||
bcs :- ; 2 2 2 2 2 2 2 00 01 02 03 04 05 06 0 0 0 0 0 0 0 | |||
lsr ; 2 2 2 2 2 2 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 | |||
bcs *+2 ; 2 3 2 3 2 3 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 | |||
beq :+ ; 3 3 2 2 2 2 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 | |||
lsr ; 2 2 2 2 2 00 00 01 01 01 1 1 0 0 1 | |||
beq @rts ; 3 3 2 2 2 00 00 01 01 01 1 1 0 0 1 | |||
bcc @rts ; 3 3 2 01 01 01 0 0 1 | |||
: bne @rts ; 2 2 3 00 00 01 0 1 0 | |||
@rts: rts ; 6 6 6 6 6 6 6 00 00 00 00 01 01 01 0 1 1 1 0 0 1 | |||
: | ; Total cycles: 25 26 27 28 29 30 31</pre> | ||
=== A + 27 cycles of delay, clobbers A, Z&N, C, V === | === A + 27 cycles of delay, clobbers A, Z&N, C, V === | ||
This code has longer overhead than delay_a_25_clocks, | |||
but it can be appended into other functions, | |||
as the execution begins from the first instruction. | |||
<pre>;;;;;;;;;;;;;;;;;;;;;;;; | <pre>;;;;;;;;;;;;;;;;;;;;;;;; | ||
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beq :+ ; 14 15 14 00 00 01 1 1 1 | beq :+ ; 14 15 14 00 00 01 1 1 1 | ||
bne :+ ; 16 01 1 | bne :+ ; 16 01 1 | ||
: rts ;15 16 17 18 19 | : rts ;15 16 17 18 19</pre> | ||
=== 256×A + X + 33 cycles of delay, clobbers A, Z&N, C, V === | === 256×A + X + 33 cycles of delay, clobbers A, Z&N, C, V === | ||
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jsr delay_a_25_clocks | jsr delay_a_25_clocks | ||
pla | pla | ||
sec | |||
sbc #1 | |||
bne :- | bne :- | ||
rts</pre> | rts</pre> | ||
Line 159: | Line 167: | ||
jsr delay_a_27_clocks | jsr delay_a_27_clocks | ||
pla | pla | ||
sec | |||
sbc #1 | |||
bne :- | bne :- | ||
rts</pre> | rts</pre> | ||
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Can be trivially changed to swap X, Y. | Can be trivially changed to swap X, Y. | ||
=== 851968×Y + 3328×A + 13×X + 30 cycles of delay, clobbers A, X, Y, Z&N, C, V === | |||
<pre>;;;;;;;;;;;;;;;;;;;;;;;; | |||
; Delays 30+13*(65536*Y+256*A+X) cycles including JSR. | |||
; Clobbers A,X,Y. | |||
delay_851968y_3328a_13x_30_clocks: | |||
iny | |||
@l1: nop | |||
nop | |||
@l2: cpx #1 | |||
dex | |||
sbc #0 | |||
bcs @l1 | |||
dey | |||
bne @l2 | |||
rts</pre> | |||
== See also == | == See also == | ||
* [[Fixed cycle delay]] | * [[Fixed cycle delay]] |
Revision as of 23:49, 20 April 2016
Delay code
Functions that cause a parametrised number of cycles of delay.
Note that all branch instructions are written assuming that no page wrap occurs. If you want to ensure this condition at compile time, use the bccnw/beqnw/etc. macros that are listed at Fixed cycle delay.
A + 25 cycles of delay, clobbers A, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A clocks + overhead ; Clobbers A. Preserves X,Y. ; Time: A+25 clocks (including JSR) ;;;;;;;;;;;;;;;;;;;;;;;; ; Cycles Accumulator Carry flag ; 0 1 2 3 4 5 6 (hex) 0 1 2 3 4 5 6 ; ; 6 6 6 6 6 6 6 00 01 02 03 04 05 06 : sbc #7 ; carry set by CMP delay_a_25_clocks: cmp #7 ; 2 2 2 2 2 2 2 00 01 02 03 04 05 06 0 0 0 0 0 0 0 bcs :- ; 2 2 2 2 2 2 2 00 01 02 03 04 05 06 0 0 0 0 0 0 0 lsr ; 2 2 2 2 2 2 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 bcs *+2 ; 2 3 2 3 2 3 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 beq :+ ; 3 3 2 2 2 2 2 00 00 01 01 02 02 03 0 1 0 1 0 1 0 lsr ; 2 2 2 2 2 00 00 01 01 01 1 1 0 0 1 beq @rts ; 3 3 2 2 2 00 00 01 01 01 1 1 0 0 1 bcc @rts ; 3 3 2 01 01 01 0 0 1 : bne @rts ; 2 2 3 00 00 01 0 1 0 @rts: rts ; 6 6 6 6 6 6 6 00 00 00 00 01 01 01 0 1 1 1 0 0 1 ; Total cycles: 25 26 27 28 29 30 31
A + 27 cycles of delay, clobbers A, Z&N, C, V
This code has longer overhead than delay_a_25_clocks, but it can be appended into other functions, as the execution begins from the first instruction.
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A clocks + overhead ; Clobbers A. Preserves X,Y. ; Time: A+27 clocks (including JSR) ;;;;;;;;;;;;;;;;;;;;;;;; delay_a_27_clocks: ; ; Cycles Accumulator Carry flag ; ; 0 1 2 3 4 (hex) 0 1 2 3 4 sec ; 0 0 0 0 0 00 01 02 03 04 1 1 1 1 1 : sbc #5 ; 2 2 2 2 2 FB FC FD FE FF 0 0 0 0 0 bcs :- ; 4 4 4 4 4 FB FC FD FE FF 0 0 0 0 0 lsr a ; 6 6 6 6 6 7D 7E 7E 7F 7F 1 0 1 0 1 bcc :+ ; 8 8 8 8 8 7D 7E 7E 7F 7F 1 0 1 0 1 : sbc #$7E ;10 11 10 11 10 FF FF 00 00 01 0 0 1 1 1 bcc :+ ;12 13 12 13 12 FF FF 00 00 01 0 0 1 1 1 beq :+ ; 14 15 14 00 00 01 1 1 1 bne :+ ; 16 01 1 : rts ;15 16 17 18 19
256×A + X + 33 cycles of delay, clobbers A, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A:X clocks+overhead ; Time: 256*A+X+33 clocks (including JSR) ; Clobbers A. Preserves X,Y. Has relocations. ;;;;;;;;;;;;;;;;;;;;;;;; : ; do 256-5 cycles. sbc #1 ; 2 cycles - Carry was set from cmp pha lda #(256-5 - 27-7-2) jsr delay_a_27_clocks pla delay_256a_x_33_clocks: cmp #1 ; +2 bcs :- ; +3 (-1) ; 0-255 cycles remain, overhead = 4 txa ; +2; 6; +27 = 33 ;passthru <<Place the function delay_a_27_clocks immediately following here>>
Can be trivially changed to swap X, Y.
256×A + X + 33 cycles of delay, relocatable, clobbers A, Y, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A:X clocks+overhead ; Time: 256*A+X+33 clocks (including JSR) ; Clobbers A,Y. Preserves X. Relocatable. ;;;;;;;;;;;;;;;;;;;;;;;; : ; do 256-5 cycles. sbc #1 ; 2 cycles - Carry was set from cmp ldy #48 ;\ dey ; |- Clobbers Y; 246 cycles, 253 total bpl *-1 ;/ ldy $A4 ; ; 3 cycles, 256 total delay_256a_x_33_clocks_b: cmp #1 ; +2 bcs :- ; +3 (-1) ; 0-255 cycles remain, overhead = 4 txa ; +2; 6; +27 = 33 ;passthru <<Place the function delay_a_27_clocks immediately following here>>
Can be trivially changed to swap X, Y.
256×A + X + 33 cycles of delay, relocatable, clobbers A, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A:X clocks+overhead ; Time: 256*A+X+33 clocks (including JSR) ; Clobbers A. Preserves X,Y. Relocatable. ; Does not depend on delay_a_25_clocks. ;;;;;;;;;;;;;;;;;;;;;;;; : ; do 256 cycles. ; 5 cycles done so far. Loop is 2+1+ 1+2+1+2+1 + 1+1 = 12 bytes. sbc #1 ; 2 cycles - Carry was set from cmp pha ;\ txa ; | ldx #46 ; | dex ; |- ; 247 cycles, 254 total bpl *-1 ; | tax ; | pla ;/ nop ; 2 cycles; 256 cycles total delay_256a_x_33_clocks_c: cmp #1 ; +2; 2 cycles overhead bcs :- ; +2; 4 cycles overhead ; 0-255 cycles remain, overhead = 4 txa ; +2; 6; +27 = 33 ;passthru <<Place the function delay_a_27_clocks immediately following here>>
256×A + 16 cycles of delay, clobbers A, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A*256 clocks + overhead ; Clobbers A. Preserves X,Y. ; Time: A*256+16 clocks (including JSR) ; Depends on delay_a_25_clocks ;;;;;;;;;;;;;;;;;;;;;;;; delay_256a_16_clocks: cmp #0 bne :+ rts delay_256a_11_clocks_: : pha lda #(256-25-7-2-2-3) jsr delay_a_25_clocks pla sec sbc #1 bne :- rts
Alternative that depends on different function:
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays A*256 clocks + overhead ; Clobbers A. Preserves X,Y. ; Time: A*256+16 clocks (including JSR) ; Depends on delay_a_27_clocks ;;;;;;;;;;;;;;;;;;;;;;;; delay_256a_16_clocks_b: cmp #0 bne :+ rts delay_256a_11_clocks_b_: : pha lda #(256-27-7-2-2-3) jsr delay_a_27_clocks pla sec sbc #1 bne :- rts
256×X + 16 cycles of delay, relocatable, clobbers X, Y, Z&N
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays X*256 clocks + overhead ; Clobbers X,Y. Preserves A. Relocatable. ; Time: X*256+16 clocks (including JSR) ;;;;;;;;;;;;;;;;;;;;;;;; delay_256x_16_clocks: cpx #0 bne :+ rts delay_256x_11_clocks_: ;5 cycles done. Loop is 256 cycles : ldy #50 dey bne *-1 dex bne :- ;Loop end is -1 cycles. Total: 4+JSR+RTS = 16 rts
Can be trivially changed to swap X, Y.
256×X + A + 30 cycles of delay, clobbers A, X, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays X*256 clocks + overhead ; Clobbers A,X. Preserves Y. ; Depends on delay_a_25_clocks within short branch distance ; Time: X*256+16 clocks (including JSR) ;;;;;;;;;;;;;;;;;;;;;;;; delay_256x_a_30_clocks: cpx #0 beq delay_a_25_clocks ;4 cycles done. Loop is 256 cycles : pha lda #(256-7-2-2-3) jsr delay_a_25_clocks pla dex beq delay_a_25_clocks ; count as 2 bne :- ;Loop end is -1+1 = 0 cycles. Total: 4+JSR+RTS = 16
Can be trivially changed to swap X, Y.
851968×Y + 3328×A + 13×X + 30 cycles of delay, clobbers A, X, Y, Z&N, C, V
;;;;;;;;;;;;;;;;;;;;;;;; ; Delays 30+13*(65536*Y+256*A+X) cycles including JSR. ; Clobbers A,X,Y. delay_851968y_3328a_13x_30_clocks: iny @l1: nop nop @l2: cpx #1 dex sbc #0 bcs @l1 dey bne @l2 rts