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| V.R. Technology's NES-on-a-chip consoles feature enhance the original NES/Famicom in several aspects:
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| * OneBus mode: PRG and CHR data come from the same address space. The cartridge connector's PPU Address lines are repurposed as higher-order CPU Address lines.
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| * Integrated MMC3-compatible bankswitching by the console, active when in OneBus mode.
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| * Ability to use NTRAM as CHR-RAM.
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| * Choice of A12 and HBLANK as a source for clocking the scanline interrupt.
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| * Automatic X/Y light gun position determination.
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| * Integrated RS232 interface.
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| * Direct NTSC/PAL and 50/60 Hz identification.
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| * Automatic per-attribute-tile background and per-sprite sprite bankswitching.
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| * DMA can be used to transfer data to PPU memory (via $2007) in addition to the normal transferring of data to OAM memory (via $2004).
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| * A second APU doubling the number of sound channels.
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| * Raw PCM output using full eight bits of resolution.
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| * DMA-driven raw PCM output.
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| * Data for DMA-driven DPCM/PCM output can be placed anywhere in CPU address space, not just within the $C000-$FFFF range.
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| * (VT03+) Internal CPU RAM is 4 KiB rather than just 2 KiB.
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| * (VT03+) Sprites can be 16 pixels wide.
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| * (VT03+) Graphics can be in four-bits-per-pixel format in addition to the regular two-bits-per-pixel format.
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| * (VT03+) Enhanced color palette with twelve bits per color.
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| * (VT16+) The CPU can be set to run at the same speed (5.37 MHz) as the PPU.
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| * (VT16+) The CPU can be set to retrieve interrupt vectors from RAM ($0FFx) rather than ROM ($FFFx).
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| * (VT16+) DMA-driven DPCM/PCM output can be set to use its own banking registers independent of normal PRG banking.
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| * (VT16+) Hardware random number generator.
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| Notes:
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| * Features are assigned to the earliest console type for which a datasheet is publicly available. The publicly-available datasheets are for the VT01, VT02, VT03, VT16 and VT18. Therefore, a feature described as VT16+ may have been available earlier on VT04 to VT15 consoles.
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| == CPU Memory Map ==
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| * CPU $0000-$07FF: 2 KiB of internal RAM
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| * CPU $0800-$0FFF: VT16+: VT01-VT03: Mirror of CPU $0000-$07FF, VT09+: Further 2 KiB of internal RAM
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| * CPU $1000-$1FFF: Mirror of CPU $0000-$0FFF
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| * CPU $2000-$2007: Famicom-compatible PPU registers
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| * CPU $2010-$201F: New PPU registers
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| * CPU $4000-$401F: Famicom-compatible APU, DMA and I/O registers
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| * CPU $4020-$403F: New APU, DMA and I/O registers
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| * CPU $4100-$41FF: New miscellaneous registers
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| * CPU $6000-$7FFF: Optional WRAM, if present on cartridge
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| * CPU $8000-$FFFF: (read) PRG-ROM
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| * CPU $8000-$FFFF: (write) When forwarding is enabled (see register $410B): MMC3-compatible registers that are forwarded to $4101-$4108)
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