CPU Test Mode: Difference between revisions
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Rainwarrior (talk | contribs) m (thread seems to have two coexisting titles) |
(APU test mode is only present in the 2A03G (and possibly some earlier revisions), and the IRQ counter was only present in the original 2A03 (where pin 30 did nothing at all).) |
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Pin 30 of the 2A03 can be activated to enable a special test mode for the | Pin 30 of the 2A03 revision G can be activated to enable a special test mode for the APU. This activates registers for testing the APU at $4018-$401A at the expense of deactivating the joypad input registers at $4016-$4017. | ||
Visual inspection of the original 2A03 revision indicates there was planned IRQ functionality from $401C-$401F, but this was left unfinished and unusable and was outright removed from later CPU revisions. | |||
Visual inspection of the | |||
* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart (WARNING: traffic)] | * Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart (WARNING: traffic)] | ||
Revision as of 13:35, 10 July 2016
Pin 30 of the 2A03 revision G can be activated to enable a special test mode for the APU. This activates registers for testing the APU at $4018-$401A at the expense of deactivating the joypad input registers at $4016-$4017.
Visual inspection of the original 2A03 revision indicates there was planned IRQ functionality from $401C-$401F, but this was left unfinished and unusable and was outright removed from later CPU revisions.
