Sachen 74LS374N pinout: Difference between revisions

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(Provide general and PCB-specific pinouts)
(Corrected pins 1 and 5 description)
Line 2: Line 2:


               .---V---.
               .---V---.
       R0.0 <- | 01 20 | -- Vcc
       R5.0 <- | 01 20 | -- Vcc
  CIRAM A10 <- | 02 19 | <- CPU A8
  CIRAM A10 <- | 02 19 | <- CPU A8
   PPU A11 -> | 03 18 | <- R/W
   PPU A11 -> | 03 18 | <- R/W
       R0.1 <- | 04 17 | <- M2
       R5.1 <- | 04 17 | <- M2
   CPU A14 -> | 05 16 | <- PPU A10
   CPU A14 -> | 05 16 | <- PPU A10
   CPU  A0 -> | 06 15 | <- /ROMSEL
   CPU  A0 -> | 06 15 | <- /ROMSEL

Revision as of 20:46, 7 December 2019

Sachen fake-marked “74LS374N”: 20-pin 0.3" DIP or epoxy blob on daughterboard).

             .---V---.
     R5.0 <- | 01 20 | -- Vcc
CIRAM A10 <- | 02 19 | <- CPU A8
  PPU A11 -> | 03 18 | <- R/W
     R5.1 <- | 04 17 | <- M2
  CPU A14 -> | 05 16 | <- PPU A10
  CPU  A0 -> | 06 15 | <- /ROMSEL
  CPU  D0 <> | 07 14 | <> CPU  D2
  CPU  D1 <> | 08 13 | -> R6.1
     R2.0 <- | 09 12 | -> R6.0
      GND -- | 10 11 | -> R4.0
             '-------'

Sachen SA-015 PCB (INES Mapper 150)

             .---V---.
  PRG A15 <- | 01 20 | -- Vcc
CIRAM A10 <- | 02 19 | <- CPU A8
  PPU A11 -> | 03 18 | <- R/W
  PRG A16 <- | 04 17 | <- M2
  CPU A14 -> | 05 16 | <- PPU A10
  CPU  A0 -> | 06 15 | <- /ROMSEL
  CPU  D0 <> | 07 14 | <> CPU  D2
  CPU  D1 <> | 08 13 | -> CHR A14
      N/C <- | 09 12 | -> CHR A13
      GND -- | 10 11 | -> CHR A15
             '-------'

Sachen SA-020A PCB (INES Mapper 243)

             .---V---.
  PRG A15 <- | 01 20 | -- Vcc
CIRAM A10 <- | 02 19 | <- CPU A8
  PPU A11 -> | 03 18 | <- R/W
  PRG A16 <- | 04 17 | <- M2
  CPU A14 -> | 05 16 | <- PPU A10
  CPU  A0 -> | 06 15 | <- /ROMSEL
  CPU  D0 <> | 07 14 | <> CPU  D2
  CPU  D1 <> | 08 13 | -> CHR A16
  CHR A13 <- | 09 12 | -> CHR A15
      GND -- | 10 11 | -> CHR A14
             '-------'